Added {} to control structures for clarity (#600)
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+32
-23
@@ -81,7 +81,7 @@ void hwPowerDown(period_t period) {
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sei();
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// Directly sleep CPU, to prevent race conditions! (see chapter 7.7 of ATMega328P datasheet)
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sleep_cpu();
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sleep_disable();
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sleep_disable();
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// restore previous WDT settings
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cli();
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wdt_reset();
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@@ -124,12 +124,16 @@ int8_t hwSleep(uint8_t interrupt1, uint8_t mode1, uint8_t interrupt2, uint8_t mo
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// Disable interrupts until going to sleep, otherwise interrupts occurring between attachInterrupt()
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// and sleep might cause the ATMega to not wakeup from sleep as interrupt has already be handled!
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cli();
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// attach interrupts
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// attach interrupts
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_wakeUp1Interrupt = interrupt1;
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_wakeUp2Interrupt = interrupt2;
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if (interrupt1 != INVALID_INTERRUPT_NUM) attachInterrupt(interrupt1, wakeUp1, mode1);
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if (interrupt2 != INVALID_INTERRUPT_NUM) attachInterrupt(interrupt2, wakeUp2, mode2);
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if (interrupt1 != INVALID_INTERRUPT_NUM) {
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attachInterrupt(interrupt1, wakeUp1, mode1);
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}
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if (interrupt2 != INVALID_INTERRUPT_NUM) {
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attachInterrupt(interrupt2, wakeUp2, mode2);
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}
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if (ms>0) {
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// sleep for defined time
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hwInternalSleep(ms);
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@@ -137,15 +141,20 @@ int8_t hwSleep(uint8_t interrupt1, uint8_t mode1, uint8_t interrupt2, uint8_t mo
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// sleep until ext interrupt triggered
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hwPowerDown(SLEEP_FOREVER);
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}
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// Assure any interrupts attached, will get detached when they did not occur.
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if (interrupt1 != INVALID_INTERRUPT_NUM) detachInterrupt(interrupt1);
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if (interrupt2 != INVALID_INTERRUPT_NUM) detachInterrupt(interrupt2);
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if (interrupt1 != INVALID_INTERRUPT_NUM) {
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detachInterrupt(interrupt1);
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}
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if (interrupt2 != INVALID_INTERRUPT_NUM) {
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detachInterrupt(interrupt2);
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}
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// Return what woke the mcu.
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int8_t ret = MY_WAKE_UP_BY_TIMER; // default: no interrupt triggered, timer wake up
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if (interruptWakeUp()) ret = static_cast<int8_t>(_wokeUpByInterrupt);
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int8_t ret = MY_WAKE_UP_BY_TIMER; // default: no interrupt triggered, timer wake up
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if (interruptWakeUp()) {
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ret = static_cast<int8_t>(_wokeUpByInterrupt);
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}
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// Clear woke-up-by-interrupt flag, so next sleeps won't return immediately.
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_wokeUpByInterrupt = INVALID_INTERRUPT_NUM;
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@@ -153,7 +162,7 @@ int8_t hwSleep(uint8_t interrupt1, uint8_t mode1, uint8_t interrupt2, uint8_t mo
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}
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uint16_t hwCPUVoltage() {
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// Measure Vcc against 1.1V Vref
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// Measure Vcc against 1.1V Vref
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#if defined(__AVR_ATmega32U4__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
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ADMUX = (_BV(REFS0) | _BV(MUX4) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1));
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#elif defined (__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__)
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@@ -162,12 +171,12 @@ uint16_t hwCPUVoltage() {
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ADMUX = (_BV(MUX3) | _BV(MUX2));
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#else
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ADMUX = (_BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1));
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#endif
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#endif
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// Vref settle
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delay(70);
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delay(70);
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// Do conversion
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ADCSRA |= _BV(ADSC);
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while (bit_is_set(ADCSRA,ADSC));
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while (bit_is_set(ADCSRA,ADSC)) {};
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// return Vcc in mV
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return (1125300UL) / ADC;
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}
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@@ -175,8 +184,8 @@ uint16_t hwCPUVoltage() {
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uint16_t hwCPUFrequency() {
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cli();
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// setup timer1
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TIFR1 = 0xFF;
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TCNT1 = 0;
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TIFR1 = 0xFF;
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TCNT1 = 0;
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TCCR1A = 0;
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TCCR1C = 0;
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// save WDT settings
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@@ -186,24 +195,24 @@ uint16_t hwCPUFrequency() {
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WDTCSR |= (1 << WDIE);
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wdt_reset();
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// start timer1 with 1024 prescaling
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TCCR1B = _BV(CS12) | _BV(CS10);
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TCCR1B = _BV(CS12) | _BV(CS10);
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// wait until wdt interrupt
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while (bit_is_clear(WDTCSR,WDIF));
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while (bit_is_clear(WDTCSR,WDIF)) {};
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// stop timer
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TCCR1B = 0;
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// restore WDT settings
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wdt_reset();
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WDTCSR |= (1 << WDCE) | (1 << WDE);
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WDTCSR = WDTsave;
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sei();
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sei();
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// return frequency in 1/10MHz (accuracy +- 10%)
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return TCNT1 * 2048UL / 100000UL;
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}
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uint16_t hwFreeMem() {
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extern int __heap_start, *__brkval;
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int v;
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return (int) &v - (__brkval == 0 ? (int) &__heap_start : (int) __brkval);
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extern int __heap_start, *__brkval;
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int v;
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return (int) &v - (__brkval == 0 ? (int) &__heap_start : (int) __brkval);
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}
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