Sensebender OTA fix
- fix OTA updates - update flash driver
This commit is contained in:
tekka007
@@ -1,16 +1,36 @@
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/*
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* Copyright (c) 2013 by Felix Rusu <felix@lowpowerlab.com>
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* SPI Flash memory library for arduino/moteino.
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* This works with 256byte/page SPI flash memory
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* For instance a 4MBit (512Kbyte) flash chip will have 2048 pages: 256*2048 = 524288 bytes (512Kbytes)
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* Minimal modifications should allow chips that have different page size but modifications
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* DEPENDS ON: Arduino SPI library
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of either the GNU General Public License version 2
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* or the GNU Lesser General Public License version 2.1, both as
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* published by the Free Software Foundation.
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*/
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// Copyright (c) 2013-2015 by Felix Rusu, LowPowerLab.com
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// SPI Flash memory library for arduino/moteino.
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// This works with 256byte/page SPI flash memory
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// For instance a 4MBit (512Kbyte) flash chip will have 2048 pages: 256*2048 = 524288 bytes (512Kbytes)
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// Minimal modifications should allow chips that have different page size but modifications
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// DEPENDS ON: Arduino SPI library
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// > Updated Jan. 5, 2015, TomWS1, modified writeBytes to allow blocks > 256 bytes and handle page misalignment.
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// > Updated Feb. 26, 2015 TomWS1, added support for SPI Transactions (Arduino 1.5.8 and above)
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// > Selective merge by Felix after testing in IDE 1.0.6, 1.6.4
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// **********************************************************************************
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// License
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// **********************************************************************************
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// This program is free software; you can redistribute it
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// and/or modify it under the terms of the GNU General
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// Public License as published by the Free Software
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// Foundation; either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will
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// be useful, but WITHOUT ANY WARRANTY; without even the
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// implied warranty of MERCHANTABILITY or FITNESS FOR A
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// PARTICULAR PURPOSE. See the GNU General Public
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// License for more details.
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//
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// You should have received a copy of the GNU General
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// Public License along with this program.
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// If not, see <http://www.gnu.org/licenses/>.
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//
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// Licence can be viewed at
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// http://www.gnu.org/licenses/gpl-3.0.txt
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//
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// Please maintain this license information along with authorship
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// and copyright notices in any redistribution of this code
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#ifndef _SPIFLASH_H_
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#define _SPIFLASH_H_
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@@ -33,19 +53,19 @@
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/// Assuming the WP pin is pulled up (to disable hardware write protection)
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/// To use any write commands the WEL bit in the status register must be set to 1.
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/// This is accomplished by sending a 0x06 command before any such write/erase command.
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/// The WEL bit in the status register resets to the logical “0” state after a
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/// device power-up or reset. In addition, the WEL bit will be reset to the logical “0” state automatically under the following conditions:
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/// • Write Disable operation completes successfully
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/// • Write Status Register operation completes successfully or aborts
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/// • Protect Sector operation completes successfully or aborts
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/// • Unprotect Sector operation completes successfully or aborts
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/// • Byte/Page Program operation completes successfully or aborts
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/// • Sequential Program Mode reaches highest unprotected memory location
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/// • Sequential Program Mode reaches the end of the memory array
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/// • Sequential Program Mode aborts
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/// • Block Erase operation completes successfully or aborts
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/// • Chip Erase operation completes successfully or aborts
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/// • Hold condition aborts
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/// The WEL bit in the status register resets to the logical ?0? state after a
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/// device power-up or reset. In addition, the WEL bit will be reset to the logical ?0? state automatically under the following conditions:
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/// ? Write Disable operation completes successfully
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/// ? Write Status Register operation completes successfully or aborts
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/// ? Protect Sector operation completes successfully or aborts
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/// ? Unprotect Sector operation completes successfully or aborts
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/// ? Byte/Page Program operation completes successfully or aborts
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/// ? Sequential Program Mode reaches highest unprotected memory location
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/// ? Sequential Program Mode reaches the end of the memory array
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/// ? Sequential Program Mode aborts
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/// ? Block Erase operation completes successfully or aborts
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/// ? Chip Erase operation completes successfully or aborts
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/// ? Hold condition aborts
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#define SPIFLASH_WRITEENABLE 0x06 // write enable
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#define SPIFLASH_WRITEDISABLE 0x04 // write disable
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@@ -69,21 +89,21 @@
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class SPIFlash {
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public:
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static byte UNIQUEID[8];
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SPIFlash(byte slaveSelectPin, uint16_t jedecID=0);
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static uint8_t UNIQUEID[8];
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SPIFlash(uint8_t slaveSelectPin, uint16_t jedecID=0);
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boolean initialize();
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void command(byte cmd, boolean isWrite=false);
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byte readStatus();
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byte readByte(long addr);
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void readBytes(long addr, void* buf, word len);
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void writeByte(long addr, byte byt);
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void writeBytes(long addr, const void* buf, uint16_t len);
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void command(uint8_t cmd, boolean isWrite=false);
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uint8_t readStatus();
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uint8_t readByte(uint32_t addr);
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void readBytes(uint32_t addr, void* buf, uint16_t len);
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void writeByte(uint32_t addr, uint8_t byt);
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void writeBytes(uint32_t addr, const void* buf, uint16_t len);
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boolean busy();
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void chipErase();
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void blockErase4K(long address);
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void blockErase32K(long address);
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word readDeviceId();
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byte* readUniqueId();
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void blockErase4K(uint32_t address);
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void blockErase32K(uint32_t address);
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uint16_t readDeviceId();
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uint8_t* readUniqueId();
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void sleep();
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void wakeup();
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@@ -91,10 +111,13 @@ public:
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protected:
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void select();
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void unselect();
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byte _slaveSelectPin;
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uint8_t _slaveSelectPin;
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uint16_t _jedecID;
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byte _SPCR;
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byte _SPSR;
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uint8_t _SPCR;
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uint8_t _SPSR;
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#ifdef SPI_HAS_TRANSACTION
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SPISettings _settings;
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#endif
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};
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#endif
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