Repo restyled using astyle (#683)
The rules are in .tools/astyle/config/style.cfg and can also be reviewed at https://www.mysensors.org/view/260#coding-guidelines-core-library
This commit is contained in:
Patrick Fallberg
GitHub
@@ -1,17 +1,17 @@
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/* An Alternative Software Serial Library
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* http://www.pjrc.com/teensy/td_libs_AltSoftSerial.html
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* Copyright (c) 2014 PJRC.COM, LLC, Paul Stoffregen, paul@pjrc.com
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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||||
* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
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* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
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||||
*
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*
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||||
* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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||||
*
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||||
*
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||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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@@ -44,28 +44,61 @@ class AltSoftSerial : public Stream
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{
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public:
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AltSoftSerial() { } //!< Constructor
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~AltSoftSerial() { end(); } //!< Destructor
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static void begin(uint32_t baud) { init((ALTSS_BASE_FREQ + baud / 2) / baud); } //!< begin
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~AltSoftSerial()
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{
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end(); //!< Destructor
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}
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static void begin(uint32_t baud)
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{
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init((ALTSS_BASE_FREQ + baud / 2) / baud); //!< begin
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}
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static void end(); //!< end
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int peek(); //!< peek
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int read(); //!< read
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int available(); //!< available
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#if ARDUINO >= 100
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size_t write(uint8_t byte) { writeByte(byte); return 1; } //!< write
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void flush() { flushOutput(); } //!< flush
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size_t write(uint8_t byte)
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{
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writeByte(byte); //!< write
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return 1;
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}
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void flush()
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{
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flushOutput(); //!< flush
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}
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#else
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void write(uint8_t byte) { writeByte(byte); } //!< write
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void flush() { flushInput(); } //!< flush
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void write(uint8_t byte)
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{
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writeByte(byte); //!< write
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}
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void flush()
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{
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flushInput(); //!< flush
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}
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#endif
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using Print::write;
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static void flushInput(); //!< flushInput
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static void flushOutput(); //!< flushOutput
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// for drop-in compatibility with NewSoftSerial, rxPin & txPin ignored
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//AltSoftSerial(uint8_t rxPin, uint8_t txPin, bool inverse = false) { }
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bool listen() { return false; } //!< listen
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bool isListening() { return true; } //!< isListening
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bool overflow() { bool r = timing_error; timing_error = false; return r; } //!< overflow
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static int library_version() { return 1; } //!< library_version
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bool listen()
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{
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return false; //!< listen
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}
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bool isListening()
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{
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return true; //!< isListening
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}
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bool overflow()
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{
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bool r = timing_error; //!< overflow
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timing_error = false;
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return r;
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}
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static int library_version()
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{
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return 1; //!< library_version
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}
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static void enable_timer0(bool) { } //!< enable_timer0
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static bool timing_error; //!< timing_error
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private:
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@@ -1,17 +1,17 @@
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/* An Alternative Software Serial Library
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* http://www.pjrc.com/teensy/td_libs_AltSoftSerial.html
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* Copyright (c) 2014 PJRC.COM, LLC, Paul Stoffregen, paul@pjrc.com
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
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*
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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@@ -26,15 +26,15 @@
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//
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#if defined(__AVR_ATmega32U4__) && defined(CORE_TEENSY)
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//#define ALTSS_USE_TIMER1
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//#define INPUT_CAPTURE_PIN 22 // receive
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//#define OUTPUT_COMPARE_A_PIN 14 // transmit
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//#define OUTPUT_COMPARE_B_PIN 15 // unusable PWM
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//#define OUTPUT_COMPARE_C_PIN 4 // unusable PWM
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//#define ALTSS_USE_TIMER1
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//#define INPUT_CAPTURE_PIN 22 // receive
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//#define OUTPUT_COMPARE_A_PIN 14 // transmit
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//#define OUTPUT_COMPARE_B_PIN 15 // unusable PWM
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//#define OUTPUT_COMPARE_C_PIN 4 // unusable PWM
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#define ALTSS_USE_TIMER3
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#define INPUT_CAPTURE_PIN 10 // receive
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#define OUTPUT_COMPARE_A_PIN 9 // transmit
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#define ALTSS_USE_TIMER3
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#define INPUT_CAPTURE_PIN 10 // receive
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#define OUTPUT_COMPARE_A_PIN 9 // transmit
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@@ -42,41 +42,41 @@
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//
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#elif defined(__AVR_AT90USB1286__) && defined(CORE_TEENSY)
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#define ALTSS_USE_TIMER1
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#define INPUT_CAPTURE_PIN 4 // receive
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#define OUTPUT_COMPARE_A_PIN 25 // transmit
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#define OUTPUT_COMPARE_B_PIN 26 // unusable PWM
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#define OUTPUT_COMPARE_C_PIN 27 // unusable PWM
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#define ALTSS_USE_TIMER1
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#define INPUT_CAPTURE_PIN 4 // receive
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#define OUTPUT_COMPARE_A_PIN 25 // transmit
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#define OUTPUT_COMPARE_B_PIN 26 // unusable PWM
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#define OUTPUT_COMPARE_C_PIN 27 // unusable PWM
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//#define ALTSS_USE_TIMER3
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//#define INPUT_CAPTURE_PIN 17 // receive
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//#define OUTPUT_COMPARE_A_PIN 16 // transmit
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//#define OUTPUT_COMPARE_B_PIN 15 // unusable PWM
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//#define OUTPUT_COMPARE_C_PIN 14 // unusable PWM
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//#define ALTSS_USE_TIMER3
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//#define INPUT_CAPTURE_PIN 17 // receive
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//#define OUTPUT_COMPARE_A_PIN 16 // transmit
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//#define OUTPUT_COMPARE_B_PIN 15 // unusable PWM
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//#define OUTPUT_COMPARE_C_PIN 14 // unusable PWM
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// Teensy 3.0 & 3.1
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//
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#elif defined(__MK20DX128__) || defined(__MK20DX256__)
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#define ALTSS_USE_FTM0
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#define INPUT_CAPTURE_PIN 20 // receive (FTM0_CH5)
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#define OUTPUT_COMPARE_A_PIN 21 // transmit (FTM0_CH6)
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#define OUTPUT_COMPARE_B_PIN 22 // unusable PWM (FTM0_CH0)
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#define OUTPUT_COMPARE_C_PIN 23 // PWM usable fixed freq
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#define OUTPUT_COMPARE_D_PIN 5 // PWM usable fixed freq
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#define OUTPUT_COMPARE_E_PIN 6 // PWM usable fixed freq
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#define OUTPUT_COMPARE_F_PIN 9 // PWM usable fixed freq
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#define OUTPUT_COMPARE_G_PIN 10 // PWM usable fixed freq
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#define ALTSS_USE_FTM0
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#define INPUT_CAPTURE_PIN 20 // receive (FTM0_CH5)
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#define OUTPUT_COMPARE_A_PIN 21 // transmit (FTM0_CH6)
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#define OUTPUT_COMPARE_B_PIN 22 // unusable PWM (FTM0_CH0)
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#define OUTPUT_COMPARE_C_PIN 23 // PWM usable fixed freq
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#define OUTPUT_COMPARE_D_PIN 5 // PWM usable fixed freq
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#define OUTPUT_COMPARE_E_PIN 6 // PWM usable fixed freq
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#define OUTPUT_COMPARE_F_PIN 9 // PWM usable fixed freq
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#define OUTPUT_COMPARE_G_PIN 10 // PWM usable fixed freq
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// Wiring-S
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//
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#elif defined(__AVR_ATmega644P__) && defined(WIRING)
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#define ALTSS_USE_TIMER1
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#define INPUT_CAPTURE_PIN 6 // receive
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#define OUTPUT_COMPARE_A_PIN 5 // transmit
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#define OUTPUT_COMPARE_B_PIN 4 // unusable PWM
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#define ALTSS_USE_TIMER1
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#define INPUT_CAPTURE_PIN 6 // receive
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#define OUTPUT_COMPARE_A_PIN 5 // transmit
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#define OUTPUT_COMPARE_B_PIN 4 // unusable PWM
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@@ -84,51 +84,51 @@
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//
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#elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__)
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#define ALTSS_USE_TIMER1
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#define INPUT_CAPTURE_PIN 8 // receive
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#define OUTPUT_COMPARE_A_PIN 9 // transmit
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#define OUTPUT_COMPARE_B_PIN 10 // unusable PWM
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#define ALTSS_USE_TIMER1
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#define INPUT_CAPTURE_PIN 8 // receive
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#define OUTPUT_COMPARE_A_PIN 9 // transmit
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#define OUTPUT_COMPARE_B_PIN 10 // unusable PWM
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// Arduino Leonardo & Yun (from Cristian Maglie)
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//
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#elif defined(ARDUINO_AVR_YUN) || defined(ARDUINO_AVR_LEONARDO) || defined(__AVR_ATmega32U4__)
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//#define ALTSS_USE_TIMER1
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//#define INPUT_CAPTURE_PIN 4 // receive
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//#define OUTPUT_COMPARE_A_PIN 9 // transmit
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//#define OUTPUT_COMPARE_B_PIN 10 // unusable PWM
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//#define OUTPUT_COMPARE_C_PIN 11 // unusable PWM
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//#define ALTSS_USE_TIMER1
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//#define INPUT_CAPTURE_PIN 4 // receive
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//#define OUTPUT_COMPARE_A_PIN 9 // transmit
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//#define OUTPUT_COMPARE_B_PIN 10 // unusable PWM
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//#define OUTPUT_COMPARE_C_PIN 11 // unusable PWM
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#define ALTSS_USE_TIMER3
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#define INPUT_CAPTURE_PIN 13 // receive
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#define OUTPUT_COMPARE_A_PIN 5 // transmit
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#define ALTSS_USE_TIMER3
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#define INPUT_CAPTURE_PIN 13 // receive
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#define OUTPUT_COMPARE_A_PIN 5 // transmit
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// Arduino Mega
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//
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#elif defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
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//#define ALTSS_USE_TIMER4
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//#define INPUT_CAPTURE_PIN 49 // receive
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//#define OUTPUT_COMPARE_A_PIN 6 // transmit
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//#define OUTPUT_COMPARE_B_PIN 7 // unusable PWM
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//#define OUTPUT_COMPARE_C_PIN 8 // unusable PWM
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//#define ALTSS_USE_TIMER4
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//#define INPUT_CAPTURE_PIN 49 // receive
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//#define OUTPUT_COMPARE_A_PIN 6 // transmit
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//#define OUTPUT_COMPARE_B_PIN 7 // unusable PWM
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//#define OUTPUT_COMPARE_C_PIN 8 // unusable PWM
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#define ALTSS_USE_TIMER5
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#define INPUT_CAPTURE_PIN 48 // receive
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#define OUTPUT_COMPARE_A_PIN 46 // transmit
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#define OUTPUT_COMPARE_B_PIN 45 // unusable PWM
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#define OUTPUT_COMPARE_C_PIN 44 // unusable PWM
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#define ALTSS_USE_TIMER5
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#define INPUT_CAPTURE_PIN 48 // receive
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#define OUTPUT_COMPARE_A_PIN 46 // transmit
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#define OUTPUT_COMPARE_B_PIN 45 // unusable PWM
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#define OUTPUT_COMPARE_C_PIN 44 // unusable PWM
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// Sanguino
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#elif defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644__)
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#define ALTSS_USE_TIMER1
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#define INPUT_CAPTURE_PIN 14 // receive
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#define OUTPUT_COMPARE_A_PIN 13 // transmit
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#define OUTPUT_COMPARE_B_PIN 12 // unusable PWM
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#define ALTSS_USE_TIMER1
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#define INPUT_CAPTURE_PIN 14 // receive
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#define OUTPUT_COMPARE_A_PIN 13 // transmit
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#define OUTPUT_COMPARE_B_PIN 12 // unusable PWM
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// Unknown board
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@@ -1,17 +1,17 @@
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/* An Alternative Software Serial Library
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* http://www.pjrc.com/teensy/td_libs_AltSoftSerial.html
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* Copyright (c) 2014 PJRC.COM, LLC, Paul Stoffregen, paul@pjrc.com
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
@@ -22,153 +22,153 @@
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*/
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#if defined(ALTSS_USE_TIMER1)
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#define CONFIG_TIMER_NOPRESCALE() (TIMSK1 = 0, TCCR1A = 0, TCCR1B = (1<<ICNC1) | (1<<CS10))
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#define CONFIG_TIMER_PRESCALE_8() (TIMSK1 = 0, TCCR1A = 0, TCCR1B = (1<<ICNC1) | (1<<CS11))
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#define CONFIG_MATCH_NORMAL() (TCCR1A = TCCR1A & ~((1<<COM1A1) | (1<<COM1A0)))
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#define CONFIG_MATCH_TOGGLE() (TCCR1A = (TCCR1A & ~(1<<COM1A1)) | (1<<COM1A0))
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#define CONFIG_MATCH_CLEAR() (TCCR1A = (TCCR1A | (1<<COM1A1)) & ~(1<<COM1A0))
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#define CONFIG_MATCH_SET() (TCCR1A = TCCR1A | ((1<<COM1A1) | (1<<COM1A0)))
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#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR1B &= ~(1<<ICES1))
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#define CONFIG_CAPTURE_RISING_EDGE() (TCCR1B |= (1<<ICES1))
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#define ENABLE_INT_INPUT_CAPTURE() (TIFR1 = (1<<ICF1), TIMSK1 = (1<<ICIE1))
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#define ENABLE_INT_COMPARE_A() (TIFR1 = (1<<OCF1A), TIMSK1 |= (1<<OCIE1A))
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#define ENABLE_INT_COMPARE_B() (TIFR1 = (1<<OCF1B), TIMSK1 |= (1<<OCIE1B))
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#define DISABLE_INT_INPUT_CAPTURE() (TIMSK1 &= ~(1<<ICIE1))
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#define DISABLE_INT_COMPARE_A() (TIMSK1 &= ~(1<<OCIE1A))
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#define DISABLE_INT_COMPARE_B() (TIMSK1 &= ~(1<<OCIE1B))
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#define GET_TIMER_COUNT() (TCNT1)
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#define GET_INPUT_CAPTURE() (ICR1)
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#define GET_COMPARE_A() (OCR1A)
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#define GET_COMPARE_B() (OCR1B)
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#define SET_COMPARE_A(val) (OCR1A = (val))
|
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#define SET_COMPARE_B(val) (OCR1B = (val))
|
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#define CAPTURE_INTERRUPT TIMER1_CAPT_vect
|
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#define COMPARE_A_INTERRUPT TIMER1_COMPA_vect
|
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#define COMPARE_B_INTERRUPT TIMER1_COMPB_vect
|
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#define CONFIG_TIMER_NOPRESCALE() (TIMSK1 = 0, TCCR1A = 0, TCCR1B = (1<<ICNC1) | (1<<CS10))
|
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#define CONFIG_TIMER_PRESCALE_8() (TIMSK1 = 0, TCCR1A = 0, TCCR1B = (1<<ICNC1) | (1<<CS11))
|
||||
#define CONFIG_MATCH_NORMAL() (TCCR1A = TCCR1A & ~((1<<COM1A1) | (1<<COM1A0)))
|
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#define CONFIG_MATCH_TOGGLE() (TCCR1A = (TCCR1A & ~(1<<COM1A1)) | (1<<COM1A0))
|
||||
#define CONFIG_MATCH_CLEAR() (TCCR1A = (TCCR1A | (1<<COM1A1)) & ~(1<<COM1A0))
|
||||
#define CONFIG_MATCH_SET() (TCCR1A = TCCR1A | ((1<<COM1A1) | (1<<COM1A0)))
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR1B &= ~(1<<ICES1))
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (TCCR1B |= (1<<ICES1))
|
||||
#define ENABLE_INT_INPUT_CAPTURE() (TIFR1 = (1<<ICF1), TIMSK1 = (1<<ICIE1))
|
||||
#define ENABLE_INT_COMPARE_A() (TIFR1 = (1<<OCF1A), TIMSK1 |= (1<<OCIE1A))
|
||||
#define ENABLE_INT_COMPARE_B() (TIFR1 = (1<<OCF1B), TIMSK1 |= (1<<OCIE1B))
|
||||
#define DISABLE_INT_INPUT_CAPTURE() (TIMSK1 &= ~(1<<ICIE1))
|
||||
#define DISABLE_INT_COMPARE_A() (TIMSK1 &= ~(1<<OCIE1A))
|
||||
#define DISABLE_INT_COMPARE_B() (TIMSK1 &= ~(1<<OCIE1B))
|
||||
#define GET_TIMER_COUNT() (TCNT1)
|
||||
#define GET_INPUT_CAPTURE() (ICR1)
|
||||
#define GET_COMPARE_A() (OCR1A)
|
||||
#define GET_COMPARE_B() (OCR1B)
|
||||
#define SET_COMPARE_A(val) (OCR1A = (val))
|
||||
#define SET_COMPARE_B(val) (OCR1B = (val))
|
||||
#define CAPTURE_INTERRUPT TIMER1_CAPT_vect
|
||||
#define COMPARE_A_INTERRUPT TIMER1_COMPA_vect
|
||||
#define COMPARE_B_INTERRUPT TIMER1_COMPB_vect
|
||||
|
||||
|
||||
#elif defined(ALTSS_USE_TIMER3)
|
||||
#define CONFIG_TIMER_NOPRESCALE() (TIMSK3 = 0, TCCR3A = 0, TCCR3B = (1<<ICNC3) | (1<<CS30))
|
||||
#define CONFIG_TIMER_PRESCALE_8() (TIMSK3 = 0, TCCR3A = 0, TCCR3B = (1<<ICNC3) | (1<<CS31))
|
||||
#define CONFIG_MATCH_NORMAL() (TCCR3A = TCCR3A & ~((1<<COM3A1) | (1<<COM3A0)))
|
||||
#define CONFIG_MATCH_TOGGLE() (TCCR3A = (TCCR3A & ~(1<<COM3A1)) | (1<<COM3A0))
|
||||
#define CONFIG_MATCH_CLEAR() (TCCR3A = (TCCR3A | (1<<COM3A1)) & ~(1<<COM3A0))
|
||||
#define CONFIG_MATCH_SET() (TCCR3A = TCCR3A | ((1<<COM3A1) | (1<<COM3A0)))
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR3B &= ~(1<<ICES3))
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (TCCR3B |= (1<<ICES3))
|
||||
#define ENABLE_INT_INPUT_CAPTURE() (TIFR3 = (1<<ICF3), TIMSK3 = (1<<ICIE3))
|
||||
#define ENABLE_INT_COMPARE_A() (TIFR3 = (1<<OCF3A), TIMSK3 |= (1<<OCIE3A))
|
||||
#define ENABLE_INT_COMPARE_B() (TIFR3 = (1<<OCF3B), TIMSK3 |= (1<<OCIE3B))
|
||||
#define DISABLE_INT_INPUT_CAPTURE() (TIMSK3 &= ~(1<<ICIE3))
|
||||
#define DISABLE_INT_COMPARE_A() (TIMSK3 &= ~(1<<OCIE3A))
|
||||
#define DISABLE_INT_COMPARE_B() (TIMSK3 &= ~(1<<OCIE3B))
|
||||
#define GET_TIMER_COUNT() (TCNT3)
|
||||
#define GET_INPUT_CAPTURE() (ICR3)
|
||||
#define GET_COMPARE_A() (OCR3A)
|
||||
#define GET_COMPARE_B() (OCR3B)
|
||||
#define SET_COMPARE_A(val) (OCR3A = (val))
|
||||
#define SET_COMPARE_B(val) (OCR3B = (val))
|
||||
#define CAPTURE_INTERRUPT TIMER3_CAPT_vect
|
||||
#define COMPARE_A_INTERRUPT TIMER3_COMPA_vect
|
||||
#define COMPARE_B_INTERRUPT TIMER3_COMPB_vect
|
||||
#define CONFIG_TIMER_NOPRESCALE() (TIMSK3 = 0, TCCR3A = 0, TCCR3B = (1<<ICNC3) | (1<<CS30))
|
||||
#define CONFIG_TIMER_PRESCALE_8() (TIMSK3 = 0, TCCR3A = 0, TCCR3B = (1<<ICNC3) | (1<<CS31))
|
||||
#define CONFIG_MATCH_NORMAL() (TCCR3A = TCCR3A & ~((1<<COM3A1) | (1<<COM3A0)))
|
||||
#define CONFIG_MATCH_TOGGLE() (TCCR3A = (TCCR3A & ~(1<<COM3A1)) | (1<<COM3A0))
|
||||
#define CONFIG_MATCH_CLEAR() (TCCR3A = (TCCR3A | (1<<COM3A1)) & ~(1<<COM3A0))
|
||||
#define CONFIG_MATCH_SET() (TCCR3A = TCCR3A | ((1<<COM3A1) | (1<<COM3A0)))
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR3B &= ~(1<<ICES3))
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (TCCR3B |= (1<<ICES3))
|
||||
#define ENABLE_INT_INPUT_CAPTURE() (TIFR3 = (1<<ICF3), TIMSK3 = (1<<ICIE3))
|
||||
#define ENABLE_INT_COMPARE_A() (TIFR3 = (1<<OCF3A), TIMSK3 |= (1<<OCIE3A))
|
||||
#define ENABLE_INT_COMPARE_B() (TIFR3 = (1<<OCF3B), TIMSK3 |= (1<<OCIE3B))
|
||||
#define DISABLE_INT_INPUT_CAPTURE() (TIMSK3 &= ~(1<<ICIE3))
|
||||
#define DISABLE_INT_COMPARE_A() (TIMSK3 &= ~(1<<OCIE3A))
|
||||
#define DISABLE_INT_COMPARE_B() (TIMSK3 &= ~(1<<OCIE3B))
|
||||
#define GET_TIMER_COUNT() (TCNT3)
|
||||
#define GET_INPUT_CAPTURE() (ICR3)
|
||||
#define GET_COMPARE_A() (OCR3A)
|
||||
#define GET_COMPARE_B() (OCR3B)
|
||||
#define SET_COMPARE_A(val) (OCR3A = (val))
|
||||
#define SET_COMPARE_B(val) (OCR3B = (val))
|
||||
#define CAPTURE_INTERRUPT TIMER3_CAPT_vect
|
||||
#define COMPARE_A_INTERRUPT TIMER3_COMPA_vect
|
||||
#define COMPARE_B_INTERRUPT TIMER3_COMPB_vect
|
||||
|
||||
|
||||
#elif defined(ALTSS_USE_TIMER4)
|
||||
#define CONFIG_TIMER_NOPRESCALE() (TIMSK4 = 0, TCCR4A = 0, TCCR4B = (1<<ICNC4) | (1<<CS40))
|
||||
#define CONFIG_TIMER_PRESCALE_8() (TIMSK4 = 0, TCCR4A = 0, TCCR4B = (1<<ICNC4) | (1<<CS41))
|
||||
#define CONFIG_MATCH_NORMAL() (TCCR4A = TCCR4A & ~((1<<COM4A1) | (1<<COM4A0)))
|
||||
#define CONFIG_MATCH_TOGGLE() (TCCR4A = (TCCR4A & ~(1<<COM4A1)) | (1<<COM4A0))
|
||||
#define CONFIG_MATCH_CLEAR() (TCCR4A = (TCCR4A | (1<<COM4A1)) & ~(1<<COM4A0))
|
||||
#define CONFIG_MATCH_SET() (TCCR4A = TCCR4A | ((1<<COM4A1) | (1<<COM4A0)))
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR4B &= ~(1<<ICES4))
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (TCCR4B |= (1<<ICES4))
|
||||
#define ENABLE_INT_INPUT_CAPTURE() (TIFR4 = (1<<ICF4), TIMSK4 = (1<<ICIE4))
|
||||
#define ENABLE_INT_COMPARE_A() (TIFR4 = (1<<OCF4A), TIMSK4 |= (1<<OCIE4A))
|
||||
#define ENABLE_INT_COMPARE_B() (TIFR4 = (1<<OCF4B), TIMSK4 |= (1<<OCIE4B))
|
||||
#define DISABLE_INT_INPUT_CAPTURE() (TIMSK4 &= ~(1<<ICIE4))
|
||||
#define DISABLE_INT_COMPARE_A() (TIMSK4 &= ~(1<<OCIE4A))
|
||||
#define DISABLE_INT_COMPARE_B() (TIMSK4 &= ~(1<<OCIE4B))
|
||||
#define GET_TIMER_COUNT() (TCNT4)
|
||||
#define GET_INPUT_CAPTURE() (ICR4)
|
||||
#define GET_COMPARE_A() (OCR4A)
|
||||
#define GET_COMPARE_B() (OCR4B)
|
||||
#define SET_COMPARE_A(val) (OCR4A = (val))
|
||||
#define SET_COMPARE_B(val) (OCR4B = (val))
|
||||
#define CAPTURE_INTERRUPT TIMER4_CAPT_vect
|
||||
#define COMPARE_A_INTERRUPT TIMER4_COMPA_vect
|
||||
#define COMPARE_B_INTERRUPT TIMER4_COMPB_vect
|
||||
#define CONFIG_TIMER_NOPRESCALE() (TIMSK4 = 0, TCCR4A = 0, TCCR4B = (1<<ICNC4) | (1<<CS40))
|
||||
#define CONFIG_TIMER_PRESCALE_8() (TIMSK4 = 0, TCCR4A = 0, TCCR4B = (1<<ICNC4) | (1<<CS41))
|
||||
#define CONFIG_MATCH_NORMAL() (TCCR4A = TCCR4A & ~((1<<COM4A1) | (1<<COM4A0)))
|
||||
#define CONFIG_MATCH_TOGGLE() (TCCR4A = (TCCR4A & ~(1<<COM4A1)) | (1<<COM4A0))
|
||||
#define CONFIG_MATCH_CLEAR() (TCCR4A = (TCCR4A | (1<<COM4A1)) & ~(1<<COM4A0))
|
||||
#define CONFIG_MATCH_SET() (TCCR4A = TCCR4A | ((1<<COM4A1) | (1<<COM4A0)))
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR4B &= ~(1<<ICES4))
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (TCCR4B |= (1<<ICES4))
|
||||
#define ENABLE_INT_INPUT_CAPTURE() (TIFR4 = (1<<ICF4), TIMSK4 = (1<<ICIE4))
|
||||
#define ENABLE_INT_COMPARE_A() (TIFR4 = (1<<OCF4A), TIMSK4 |= (1<<OCIE4A))
|
||||
#define ENABLE_INT_COMPARE_B() (TIFR4 = (1<<OCF4B), TIMSK4 |= (1<<OCIE4B))
|
||||
#define DISABLE_INT_INPUT_CAPTURE() (TIMSK4 &= ~(1<<ICIE4))
|
||||
#define DISABLE_INT_COMPARE_A() (TIMSK4 &= ~(1<<OCIE4A))
|
||||
#define DISABLE_INT_COMPARE_B() (TIMSK4 &= ~(1<<OCIE4B))
|
||||
#define GET_TIMER_COUNT() (TCNT4)
|
||||
#define GET_INPUT_CAPTURE() (ICR4)
|
||||
#define GET_COMPARE_A() (OCR4A)
|
||||
#define GET_COMPARE_B() (OCR4B)
|
||||
#define SET_COMPARE_A(val) (OCR4A = (val))
|
||||
#define SET_COMPARE_B(val) (OCR4B = (val))
|
||||
#define CAPTURE_INTERRUPT TIMER4_CAPT_vect
|
||||
#define COMPARE_A_INTERRUPT TIMER4_COMPA_vect
|
||||
#define COMPARE_B_INTERRUPT TIMER4_COMPB_vect
|
||||
|
||||
|
||||
#elif defined(ALTSS_USE_TIMER5)
|
||||
#define CONFIG_TIMER_NOPRESCALE() (TIMSK5 = 0, TCCR5A = 0, TCCR5B = (1<<ICNC5) | (1<<CS50))
|
||||
#define CONFIG_TIMER_PRESCALE_8() (TIMSK5 = 0, TCCR5A = 0, TCCR5B = (1<<ICNC5) | (1<<CS51))
|
||||
#define CONFIG_MATCH_NORMAL() (TCCR5A = TCCR5A & ~((1<<COM5A1) | (1<<COM5A0)))
|
||||
#define CONFIG_MATCH_TOGGLE() (TCCR5A = (TCCR5A & ~(1<<COM5A1)) | (1<<COM5A0))
|
||||
#define CONFIG_MATCH_CLEAR() (TCCR5A = (TCCR5A | (1<<COM5A1)) & ~(1<<COM5A0))
|
||||
#define CONFIG_MATCH_SET() (TCCR5A = TCCR5A | ((1<<COM5A1) | (1<<COM5A0)))
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR5B &= ~(1<<ICES5))
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (TCCR5B |= (1<<ICES5))
|
||||
#define ENABLE_INT_INPUT_CAPTURE() (TIFR5 = (1<<ICF5), TIMSK5 = (1<<ICIE5))
|
||||
#define ENABLE_INT_COMPARE_A() (TIFR5 = (1<<OCF5A), TIMSK5 |= (1<<OCIE5A))
|
||||
#define ENABLE_INT_COMPARE_B() (TIFR5 = (1<<OCF5B), TIMSK5 |= (1<<OCIE5B))
|
||||
#define DISABLE_INT_INPUT_CAPTURE() (TIMSK5 &= ~(1<<ICIE5))
|
||||
#define DISABLE_INT_COMPARE_A() (TIMSK5 &= ~(1<<OCIE5A))
|
||||
#define DISABLE_INT_COMPARE_B() (TIMSK5 &= ~(1<<OCIE5B))
|
||||
#define GET_TIMER_COUNT() (TCNT5)
|
||||
#define GET_INPUT_CAPTURE() (ICR5)
|
||||
#define GET_COMPARE_A() (OCR5A)
|
||||
#define GET_COMPARE_B() (OCR5B)
|
||||
#define SET_COMPARE_A(val) (OCR5A = (val))
|
||||
#define SET_COMPARE_B(val) (OCR5B = (val))
|
||||
#define CAPTURE_INTERRUPT TIMER5_CAPT_vect
|
||||
#define COMPARE_A_INTERRUPT TIMER5_COMPA_vect
|
||||
#define COMPARE_B_INTERRUPT TIMER5_COMPB_vect
|
||||
#define CONFIG_TIMER_NOPRESCALE() (TIMSK5 = 0, TCCR5A = 0, TCCR5B = (1<<ICNC5) | (1<<CS50))
|
||||
#define CONFIG_TIMER_PRESCALE_8() (TIMSK5 = 0, TCCR5A = 0, TCCR5B = (1<<ICNC5) | (1<<CS51))
|
||||
#define CONFIG_MATCH_NORMAL() (TCCR5A = TCCR5A & ~((1<<COM5A1) | (1<<COM5A0)))
|
||||
#define CONFIG_MATCH_TOGGLE() (TCCR5A = (TCCR5A & ~(1<<COM5A1)) | (1<<COM5A0))
|
||||
#define CONFIG_MATCH_CLEAR() (TCCR5A = (TCCR5A | (1<<COM5A1)) & ~(1<<COM5A0))
|
||||
#define CONFIG_MATCH_SET() (TCCR5A = TCCR5A | ((1<<COM5A1) | (1<<COM5A0)))
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR5B &= ~(1<<ICES5))
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (TCCR5B |= (1<<ICES5))
|
||||
#define ENABLE_INT_INPUT_CAPTURE() (TIFR5 = (1<<ICF5), TIMSK5 = (1<<ICIE5))
|
||||
#define ENABLE_INT_COMPARE_A() (TIFR5 = (1<<OCF5A), TIMSK5 |= (1<<OCIE5A))
|
||||
#define ENABLE_INT_COMPARE_B() (TIFR5 = (1<<OCF5B), TIMSK5 |= (1<<OCIE5B))
|
||||
#define DISABLE_INT_INPUT_CAPTURE() (TIMSK5 &= ~(1<<ICIE5))
|
||||
#define DISABLE_INT_COMPARE_A() (TIMSK5 &= ~(1<<OCIE5A))
|
||||
#define DISABLE_INT_COMPARE_B() (TIMSK5 &= ~(1<<OCIE5B))
|
||||
#define GET_TIMER_COUNT() (TCNT5)
|
||||
#define GET_INPUT_CAPTURE() (ICR5)
|
||||
#define GET_COMPARE_A() (OCR5A)
|
||||
#define GET_COMPARE_B() (OCR5B)
|
||||
#define SET_COMPARE_A(val) (OCR5A = (val))
|
||||
#define SET_COMPARE_B(val) (OCR5B = (val))
|
||||
#define CAPTURE_INTERRUPT TIMER5_CAPT_vect
|
||||
#define COMPARE_A_INTERRUPT TIMER5_COMPA_vect
|
||||
#define COMPARE_B_INTERRUPT TIMER5_COMPB_vect
|
||||
|
||||
|
||||
#elif defined(ALTSS_USE_FTM0)
|
||||
// CH5 = input capture (input, pin 20)
|
||||
// CH6 = compare a (output, pin 21)
|
||||
// CH0 = compare b (input timeout)
|
||||
#define CONFIG_TIMER_NOPRESCALE() FTM0_SC = 0; FTM0_CNT = 0; FTM0_MOD = 0xFFFF; \
|
||||
FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(0); \
|
||||
digitalWriteFast(21, HIGH); \
|
||||
NVIC_SET_PRIORITY(IRQ_FTM0, 48); \
|
||||
NVIC_ENABLE_IRQ(IRQ_FTM0);
|
||||
#define CONFIG_TIMER_PRESCALE_8() FTM0_SC = 0; FTM0_CNT = 0; FTM0_MOD = 0xFFFF; \
|
||||
FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(3); \
|
||||
digitalWriteFast(21, HIGH); \
|
||||
NVIC_SET_PRIORITY(IRQ_FTM0, 48); \
|
||||
NVIC_ENABLE_IRQ(IRQ_FTM0);
|
||||
#define CONFIG_MATCH_NORMAL() (FTM0_C6SC = 0)
|
||||
#define CONFIG_MATCH_TOGGLE() (FTM0_C6SC = (FTM0_C6SC & 0xC3) | 0x14)
|
||||
#define CONFIG_MATCH_CLEAR() (FTM0_C6SC = (FTM0_C6SC & 0xC3) | 0x18)
|
||||
#define CONFIG_MATCH_SET() (FTM0_C6SC = (FTM0_C6SC & 0xC3) | 0x1C)
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (FTM0_C5SC = (FTM0_C5SC & 0xC3) | 0x08)
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (FTM0_C5SC = (FTM0_C5SC & 0xC3) | 0x04)
|
||||
#define ENABLE_INT_INPUT_CAPTURE() FTM0_C5SC = 0x48; \
|
||||
CORE_PIN20_CONFIG = PORT_PCR_MUX(4)|PORT_PCR_PE|PORT_PCR_PS
|
||||
#define ENABLE_INT_COMPARE_A() FTM0_C6SC |= 0x40; \
|
||||
CORE_PIN21_CONFIG = PORT_PCR_MUX(4)|PORT_PCR_DSE|PORT_PCR_SRE
|
||||
#define ENABLE_INT_COMPARE_B() (FTM0_C0SC |= 0x40)
|
||||
#define DISABLE_INT_INPUT_CAPTURE() FTM0_C5SC &= ~0x40; \
|
||||
CORE_PIN20_CONFIG = PORT_PCR_MUX(1)|PORT_PCR_PE|PORT_PCR_PS
|
||||
#define DISABLE_INT_COMPARE_A() FTM0_C6SC &= ~0x40; \
|
||||
CORE_PIN21_CONFIG = PORT_PCR_MUX(1)|PORT_PCR_DSE|PORT_PCR_SRE; \
|
||||
digitalWriteFast(21, HIGH)
|
||||
#define DISABLE_INT_COMPARE_B() (FTM0_C0SC &= ~0x40)
|
||||
#define GET_TIMER_COUNT() (FTM0_CNT)
|
||||
#define GET_INPUT_CAPTURE() (FTM0_C5V)
|
||||
#define GET_COMPARE_A() (FTM0_C6V)
|
||||
#define GET_COMPARE_B() (FTM0_C0V)
|
||||
#define SET_COMPARE_A(val) (FTM0_C6V = val)
|
||||
#define SET_COMPARE_B(val) (FTM0_C0V = val)
|
||||
#define CAPTURE_INTERRUPT altss_capture_interrupt
|
||||
#define COMPARE_A_INTERRUPT altss_compare_a_interrupt
|
||||
#define COMPARE_B_INTERRUPT altss_compare_b_interrupt
|
||||
#ifdef ISR
|
||||
#undef ISR
|
||||
#endif
|
||||
#define ISR(f) static void f (void)
|
||||
// CH5 = input capture (input, pin 20)
|
||||
// CH6 = compare a (output, pin 21)
|
||||
// CH0 = compare b (input timeout)
|
||||
#define CONFIG_TIMER_NOPRESCALE() FTM0_SC = 0; FTM0_CNT = 0; FTM0_MOD = 0xFFFF; \
|
||||
FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(0); \
|
||||
digitalWriteFast(21, HIGH); \
|
||||
NVIC_SET_PRIORITY(IRQ_FTM0, 48); \
|
||||
NVIC_ENABLE_IRQ(IRQ_FTM0);
|
||||
#define CONFIG_TIMER_PRESCALE_8() FTM0_SC = 0; FTM0_CNT = 0; FTM0_MOD = 0xFFFF; \
|
||||
FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(3); \
|
||||
digitalWriteFast(21, HIGH); \
|
||||
NVIC_SET_PRIORITY(IRQ_FTM0, 48); \
|
||||
NVIC_ENABLE_IRQ(IRQ_FTM0);
|
||||
#define CONFIG_MATCH_NORMAL() (FTM0_C6SC = 0)
|
||||
#define CONFIG_MATCH_TOGGLE() (FTM0_C6SC = (FTM0_C6SC & 0xC3) | 0x14)
|
||||
#define CONFIG_MATCH_CLEAR() (FTM0_C6SC = (FTM0_C6SC & 0xC3) | 0x18)
|
||||
#define CONFIG_MATCH_SET() (FTM0_C6SC = (FTM0_C6SC & 0xC3) | 0x1C)
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (FTM0_C5SC = (FTM0_C5SC & 0xC3) | 0x08)
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (FTM0_C5SC = (FTM0_C5SC & 0xC3) | 0x04)
|
||||
#define ENABLE_INT_INPUT_CAPTURE() FTM0_C5SC = 0x48; \
|
||||
CORE_PIN20_CONFIG = PORT_PCR_MUX(4)|PORT_PCR_PE|PORT_PCR_PS
|
||||
#define ENABLE_INT_COMPARE_A() FTM0_C6SC |= 0x40; \
|
||||
CORE_PIN21_CONFIG = PORT_PCR_MUX(4)|PORT_PCR_DSE|PORT_PCR_SRE
|
||||
#define ENABLE_INT_COMPARE_B() (FTM0_C0SC |= 0x40)
|
||||
#define DISABLE_INT_INPUT_CAPTURE() FTM0_C5SC &= ~0x40; \
|
||||
CORE_PIN20_CONFIG = PORT_PCR_MUX(1)|PORT_PCR_PE|PORT_PCR_PS
|
||||
#define DISABLE_INT_COMPARE_A() FTM0_C6SC &= ~0x40; \
|
||||
CORE_PIN21_CONFIG = PORT_PCR_MUX(1)|PORT_PCR_DSE|PORT_PCR_SRE; \
|
||||
digitalWriteFast(21, HIGH)
|
||||
#define DISABLE_INT_COMPARE_B() (FTM0_C0SC &= ~0x40)
|
||||
#define GET_TIMER_COUNT() (FTM0_CNT)
|
||||
#define GET_INPUT_CAPTURE() (FTM0_C5V)
|
||||
#define GET_COMPARE_A() (FTM0_C6V)
|
||||
#define GET_COMPARE_B() (FTM0_C0V)
|
||||
#define SET_COMPARE_A(val) (FTM0_C6V = val)
|
||||
#define SET_COMPARE_B(val) (FTM0_C0V = val)
|
||||
#define CAPTURE_INTERRUPT altss_capture_interrupt
|
||||
#define COMPARE_A_INTERRUPT altss_compare_a_interrupt
|
||||
#define COMPARE_B_INTERRUPT altss_compare_b_interrupt
|
||||
#ifdef ISR
|
||||
#undef ISR
|
||||
#endif
|
||||
#define ISR(f) static void f (void)
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
@@ -4,15 +4,15 @@
|
||||
//
|
||||
#if defined(__AVR_ATmega32U4__) && defined(CORE_TEENSY)
|
||||
|
||||
//#define ALTSS_USE_TIMER1
|
||||
//#define INPUT_CAPTURE_PIN 22 // receive
|
||||
//#define OUTPUT_COMPARE_A_PIN 14 // transmit
|
||||
//#define OUTPUT_COMPARE_B_PIN 15 // unusable PWM
|
||||
//#define OUTPUT_COMPARE_C_PIN 4 // unusable PWM
|
||||
//#define ALTSS_USE_TIMER1
|
||||
//#define INPUT_CAPTURE_PIN 22 // receive
|
||||
//#define OUTPUT_COMPARE_A_PIN 14 // transmit
|
||||
//#define OUTPUT_COMPARE_B_PIN 15 // unusable PWM
|
||||
//#define OUTPUT_COMPARE_C_PIN 4 // unusable PWM
|
||||
|
||||
#define ALTSS_USE_TIMER3
|
||||
#define INPUT_CAPTURE_PIN 10 // receive
|
||||
#define OUTPUT_COMPARE_A_PIN 9 // transmit
|
||||
#define ALTSS_USE_TIMER3
|
||||
#define INPUT_CAPTURE_PIN 10 // receive
|
||||
#define OUTPUT_COMPARE_A_PIN 9 // transmit
|
||||
|
||||
|
||||
|
||||
@@ -20,17 +20,17 @@
|
||||
//
|
||||
#elif defined(__AVR_AT90USB1286__) && defined(CORE_TEENSY)
|
||||
|
||||
#define ALTSS_USE_TIMER1
|
||||
#define INPUT_CAPTURE_PIN 4 // receive
|
||||
#define OUTPUT_COMPARE_A_PIN 25 // transmit
|
||||
#define OUTPUT_COMPARE_B_PIN 26 // unusable PWM
|
||||
#define OUTPUT_COMPARE_C_PIN 27 // unusable PWM
|
||||
#define ALTSS_USE_TIMER1
|
||||
#define INPUT_CAPTURE_PIN 4 // receive
|
||||
#define OUTPUT_COMPARE_A_PIN 25 // transmit
|
||||
#define OUTPUT_COMPARE_B_PIN 26 // unusable PWM
|
||||
#define OUTPUT_COMPARE_C_PIN 27 // unusable PWM
|
||||
|
||||
//#define ALTSS_USE_TIMER3
|
||||
//#define INPUT_CAPTURE_PIN 17 // receive
|
||||
//#define OUTPUT_COMPARE_A_PIN 16 // transmit
|
||||
//#define OUTPUT_COMPARE_B_PIN 15 // unusable PWM
|
||||
//#define OUTPUT_COMPARE_C_PIN 14 // unusable PWM
|
||||
//#define ALTSS_USE_TIMER3
|
||||
//#define INPUT_CAPTURE_PIN 17 // receive
|
||||
//#define OUTPUT_COMPARE_A_PIN 16 // transmit
|
||||
//#define OUTPUT_COMPARE_B_PIN 15 // unusable PWM
|
||||
//#define OUTPUT_COMPARE_C_PIN 14 // unusable PWM
|
||||
|
||||
|
||||
|
||||
@@ -38,10 +38,10 @@
|
||||
//
|
||||
#elif defined(__AVR_ATmega644P__) && defined(WIRING)
|
||||
|
||||
#define ALTSS_USE_TIMER1
|
||||
#define INPUT_CAPTURE_PIN 6 // receive
|
||||
#define OUTPUT_COMPARE_A_PIN 5 // transmit
|
||||
#define OUTPUT_COMPARE_B_PIN 4 // unusable PWM
|
||||
#define ALTSS_USE_TIMER1
|
||||
#define INPUT_CAPTURE_PIN 6 // receive
|
||||
#define OUTPUT_COMPARE_A_PIN 5 // transmit
|
||||
#define OUTPUT_COMPARE_B_PIN 4 // unusable PWM
|
||||
|
||||
|
||||
|
||||
@@ -49,51 +49,51 @@
|
||||
//
|
||||
#elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__)
|
||||
|
||||
#define ALTSS_USE_TIMER1
|
||||
#define INPUT_CAPTURE_PIN 8 // receive
|
||||
#define OUTPUT_COMPARE_A_PIN 9 // transmit
|
||||
#define OUTPUT_COMPARE_B_PIN 10 // unusable PWM
|
||||
#define ALTSS_USE_TIMER1
|
||||
#define INPUT_CAPTURE_PIN 8 // receive
|
||||
#define OUTPUT_COMPARE_A_PIN 9 // transmit
|
||||
#define OUTPUT_COMPARE_B_PIN 10 // unusable PWM
|
||||
|
||||
|
||||
// Arduino Leonardo & Yun (from Cristian Maglie)
|
||||
//
|
||||
#elif defined(ARDUINO_AVR_YUN) || defined(ARDUINO_AVR_LEONARDO)
|
||||
|
||||
//#define ALTSS_USE_TIMER1
|
||||
//#define INPUT_CAPTURE_PIN 4 // receive
|
||||
//#define OUTPUT_COMPARE_A_PIN 9 // transmit
|
||||
//#define OUTPUT_COMPARE_B_PIN 10 // unusable PWM
|
||||
//#define OUTPUT_COMPARE_C_PIN 11 // unusable PWM
|
||||
//#define ALTSS_USE_TIMER1
|
||||
//#define INPUT_CAPTURE_PIN 4 // receive
|
||||
//#define OUTPUT_COMPARE_A_PIN 9 // transmit
|
||||
//#define OUTPUT_COMPARE_B_PIN 10 // unusable PWM
|
||||
//#define OUTPUT_COMPARE_C_PIN 11 // unusable PWM
|
||||
|
||||
#define ALTSS_USE_TIMER3
|
||||
#define INPUT_CAPTURE_PIN 13 // receive
|
||||
#define OUTPUT_COMPARE_A_PIN 5 // transmit
|
||||
#define ALTSS_USE_TIMER3
|
||||
#define INPUT_CAPTURE_PIN 13 // receive
|
||||
#define OUTPUT_COMPARE_A_PIN 5 // transmit
|
||||
|
||||
|
||||
// Arduino Mega
|
||||
//
|
||||
#elif defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
|
||||
|
||||
//#define ALTSS_USE_TIMER4
|
||||
//#define INPUT_CAPTURE_PIN 49 // receive
|
||||
//#define OUTPUT_COMPARE_A_PIN 6 // transmit
|
||||
//#define OUTPUT_COMPARE_B_PIN 7 // unusable PWM
|
||||
//#define OUTPUT_COMPARE_C_PIN 8 // unusable PWM
|
||||
//#define ALTSS_USE_TIMER4
|
||||
//#define INPUT_CAPTURE_PIN 49 // receive
|
||||
//#define OUTPUT_COMPARE_A_PIN 6 // transmit
|
||||
//#define OUTPUT_COMPARE_B_PIN 7 // unusable PWM
|
||||
//#define OUTPUT_COMPARE_C_PIN 8 // unusable PWM
|
||||
|
||||
#define ALTSS_USE_TIMER5
|
||||
#define INPUT_CAPTURE_PIN 48 // receive
|
||||
#define OUTPUT_COMPARE_A_PIN 46 // transmit
|
||||
#define OUTPUT_COMPARE_B_PIN 45 // unusable PWM
|
||||
#define OUTPUT_COMPARE_C_PIN 44 // unusable PWM
|
||||
#define ALTSS_USE_TIMER5
|
||||
#define INPUT_CAPTURE_PIN 48 // receive
|
||||
#define OUTPUT_COMPARE_A_PIN 46 // transmit
|
||||
#define OUTPUT_COMPARE_B_PIN 45 // unusable PWM
|
||||
#define OUTPUT_COMPARE_C_PIN 44 // unusable PWM
|
||||
|
||||
|
||||
|
||||
// Sanguino
|
||||
#elif defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644__)
|
||||
#define ALTSS_USE_TIMER1
|
||||
#define INPUT_CAPTURE_PIN 14 // receive
|
||||
#define OUTPUT_COMPARE_A_PIN 13 // transmit
|
||||
#define OUTPUT_COMPARE_B_PIN 12 // unusable PWM
|
||||
#define ALTSS_USE_TIMER1
|
||||
#define INPUT_CAPTURE_PIN 14 // receive
|
||||
#define OUTPUT_COMPARE_A_PIN 13 // transmit
|
||||
#define OUTPUT_COMPARE_B_PIN 12 // unusable PWM
|
||||
|
||||
|
||||
// Unknown board
|
||||
|
||||
@@ -1,106 +1,106 @@
|
||||
|
||||
#if defined(ALTSS_USE_TIMER1)
|
||||
#define CONFIG_TIMER_NOPRESCALE() (TIMSK1 = 0, TCCR1A = 0, TCCR1B = (1<<ICNC1) | (1<<CS10))
|
||||
#define CONFIG_TIMER_PRESCALE_8() (TIMSK1 = 0, TCCR1A = 0, TCCR1B = (1<<ICNC1) | (1<<CS11))
|
||||
#define CONFIG_MATCH_NORMAL() (TCCR1A = TCCR1A & ~((1<<COM1A1) | (1<<COM1A0)))
|
||||
#define CONFIG_MATCH_TOGGLE() (TCCR1A = (TCCR1A & ~(1<<COM1A1)) | (1<<COM1A0))
|
||||
#define CONFIG_MATCH_CLEAR() (TCCR1A = (TCCR1A | (1<<COM1A1)) & ~(1<<COM1A0))
|
||||
#define CONFIG_MATCH_SET() (TCCR1A = TCCR1A | ((1<<COM1A1) | (1<<COM1A0)))
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR1B &= ~(1<<ICES1))
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (TCCR1B |= (1<<ICES1))
|
||||
#define ENABLE_INT_INPUT_CAPTURE() (TIFR1 = (1<<ICF1), TIMSK1 = (1<<ICIE1))
|
||||
#define ENABLE_INT_COMPARE_A() (TIFR1 = (1<<OCF1A), TIMSK1 |= (1<<OCIE1A))
|
||||
#define ENABLE_INT_COMPARE_B() (TIFR1 = (1<<OCF1B), TIMSK1 |= (1<<OCIE1B))
|
||||
#define DISABLE_INT_INPUT_CAPTURE() (TIMSK1 &= ~(1<<ICIE1))
|
||||
#define DISABLE_INT_COMPARE_A() (TIMSK1 &= ~(1<<OCIE1A))
|
||||
#define DISABLE_INT_COMPARE_B() (TIMSK1 &= ~(1<<OCIE1B))
|
||||
#define GET_TIMER_COUNT() (TCNT1)
|
||||
#define GET_INPUT_CAPTURE() (ICR1)
|
||||
#define GET_COMPARE_A() (OCR1A)
|
||||
#define GET_COMPARE_B() (OCR1B)
|
||||
#define SET_COMPARE_A(val) (OCR1A = (val))
|
||||
#define SET_COMPARE_B(val) (OCR1B = (val))
|
||||
#define CAPTURE_INTERRUPT TIMER1_CAPT_vect
|
||||
#define COMPARE_A_INTERRUPT TIMER1_COMPA_vect
|
||||
#define COMPARE_B_INTERRUPT TIMER1_COMPB_vect
|
||||
#define CONFIG_TIMER_NOPRESCALE() (TIMSK1 = 0, TCCR1A = 0, TCCR1B = (1<<ICNC1) | (1<<CS10))
|
||||
#define CONFIG_TIMER_PRESCALE_8() (TIMSK1 = 0, TCCR1A = 0, TCCR1B = (1<<ICNC1) | (1<<CS11))
|
||||
#define CONFIG_MATCH_NORMAL() (TCCR1A = TCCR1A & ~((1<<COM1A1) | (1<<COM1A0)))
|
||||
#define CONFIG_MATCH_TOGGLE() (TCCR1A = (TCCR1A & ~(1<<COM1A1)) | (1<<COM1A0))
|
||||
#define CONFIG_MATCH_CLEAR() (TCCR1A = (TCCR1A | (1<<COM1A1)) & ~(1<<COM1A0))
|
||||
#define CONFIG_MATCH_SET() (TCCR1A = TCCR1A | ((1<<COM1A1) | (1<<COM1A0)))
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR1B &= ~(1<<ICES1))
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (TCCR1B |= (1<<ICES1))
|
||||
#define ENABLE_INT_INPUT_CAPTURE() (TIFR1 = (1<<ICF1), TIMSK1 = (1<<ICIE1))
|
||||
#define ENABLE_INT_COMPARE_A() (TIFR1 = (1<<OCF1A), TIMSK1 |= (1<<OCIE1A))
|
||||
#define ENABLE_INT_COMPARE_B() (TIFR1 = (1<<OCF1B), TIMSK1 |= (1<<OCIE1B))
|
||||
#define DISABLE_INT_INPUT_CAPTURE() (TIMSK1 &= ~(1<<ICIE1))
|
||||
#define DISABLE_INT_COMPARE_A() (TIMSK1 &= ~(1<<OCIE1A))
|
||||
#define DISABLE_INT_COMPARE_B() (TIMSK1 &= ~(1<<OCIE1B))
|
||||
#define GET_TIMER_COUNT() (TCNT1)
|
||||
#define GET_INPUT_CAPTURE() (ICR1)
|
||||
#define GET_COMPARE_A() (OCR1A)
|
||||
#define GET_COMPARE_B() (OCR1B)
|
||||
#define SET_COMPARE_A(val) (OCR1A = (val))
|
||||
#define SET_COMPARE_B(val) (OCR1B = (val))
|
||||
#define CAPTURE_INTERRUPT TIMER1_CAPT_vect
|
||||
#define COMPARE_A_INTERRUPT TIMER1_COMPA_vect
|
||||
#define COMPARE_B_INTERRUPT TIMER1_COMPB_vect
|
||||
|
||||
|
||||
#elif defined(ALTSS_USE_TIMER3)
|
||||
#define CONFIG_TIMER_NOPRESCALE() (TIMSK3 = 0, TCCR3A = 0, TCCR3B = (1<<ICNC3) | (1<<CS30))
|
||||
#define CONFIG_TIMER_PRESCALE_8() (TIMSK3 = 0, TCCR3A = 0, TCCR3B = (1<<ICNC3) | (1<<CS31))
|
||||
#define CONFIG_MATCH_NORMAL() (TCCR3A = TCCR3A & ~((1<<COM3A1) | (1<<COM3A0)))
|
||||
#define CONFIG_MATCH_TOGGLE() (TCCR3A = (TCCR3A & ~(1<<COM3A1)) | (1<<COM3A0))
|
||||
#define CONFIG_MATCH_CLEAR() (TCCR3A = (TCCR3A | (1<<COM3A1)) & ~(1<<COM3A0))
|
||||
#define CONFIG_MATCH_SET() (TCCR3A = TCCR3A | ((1<<COM3A1) | (1<<COM3A0)))
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR3B &= ~(1<<ICES3))
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (TCCR3B |= (1<<ICES3))
|
||||
#define ENABLE_INT_INPUT_CAPTURE() (TIFR3 = (1<<ICF3), TIMSK3 = (1<<ICIE3))
|
||||
#define ENABLE_INT_COMPARE_A() (TIFR3 = (1<<OCF3A), TIMSK3 |= (1<<OCIE3A))
|
||||
#define ENABLE_INT_COMPARE_B() (TIFR3 = (1<<OCF3B), TIMSK3 |= (1<<OCIE3B))
|
||||
#define DISABLE_INT_INPUT_CAPTURE() (TIMSK3 &= ~(1<<ICIE3))
|
||||
#define DISABLE_INT_COMPARE_A() (TIMSK3 &= ~(1<<OCIE3A))
|
||||
#define DISABLE_INT_COMPARE_B() (TIMSK3 &= ~(1<<OCIE3B))
|
||||
#define GET_TIMER_COUNT() (TCNT3)
|
||||
#define GET_INPUT_CAPTURE() (ICR3)
|
||||
#define GET_COMPARE_A() (OCR3A)
|
||||
#define GET_COMPARE_B() (OCR3B)
|
||||
#define SET_COMPARE_A(val) (OCR3A = (val))
|
||||
#define SET_COMPARE_B(val) (OCR3B = (val))
|
||||
#define CAPTURE_INTERRUPT TIMER3_CAPT_vect
|
||||
#define COMPARE_A_INTERRUPT TIMER3_COMPA_vect
|
||||
#define COMPARE_B_INTERRUPT TIMER3_COMPB_vect
|
||||
#define CONFIG_TIMER_NOPRESCALE() (TIMSK3 = 0, TCCR3A = 0, TCCR3B = (1<<ICNC3) | (1<<CS30))
|
||||
#define CONFIG_TIMER_PRESCALE_8() (TIMSK3 = 0, TCCR3A = 0, TCCR3B = (1<<ICNC3) | (1<<CS31))
|
||||
#define CONFIG_MATCH_NORMAL() (TCCR3A = TCCR3A & ~((1<<COM3A1) | (1<<COM3A0)))
|
||||
#define CONFIG_MATCH_TOGGLE() (TCCR3A = (TCCR3A & ~(1<<COM3A1)) | (1<<COM3A0))
|
||||
#define CONFIG_MATCH_CLEAR() (TCCR3A = (TCCR3A | (1<<COM3A1)) & ~(1<<COM3A0))
|
||||
#define CONFIG_MATCH_SET() (TCCR3A = TCCR3A | ((1<<COM3A1) | (1<<COM3A0)))
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR3B &= ~(1<<ICES3))
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (TCCR3B |= (1<<ICES3))
|
||||
#define ENABLE_INT_INPUT_CAPTURE() (TIFR3 = (1<<ICF3), TIMSK3 = (1<<ICIE3))
|
||||
#define ENABLE_INT_COMPARE_A() (TIFR3 = (1<<OCF3A), TIMSK3 |= (1<<OCIE3A))
|
||||
#define ENABLE_INT_COMPARE_B() (TIFR3 = (1<<OCF3B), TIMSK3 |= (1<<OCIE3B))
|
||||
#define DISABLE_INT_INPUT_CAPTURE() (TIMSK3 &= ~(1<<ICIE3))
|
||||
#define DISABLE_INT_COMPARE_A() (TIMSK3 &= ~(1<<OCIE3A))
|
||||
#define DISABLE_INT_COMPARE_B() (TIMSK3 &= ~(1<<OCIE3B))
|
||||
#define GET_TIMER_COUNT() (TCNT3)
|
||||
#define GET_INPUT_CAPTURE() (ICR3)
|
||||
#define GET_COMPARE_A() (OCR3A)
|
||||
#define GET_COMPARE_B() (OCR3B)
|
||||
#define SET_COMPARE_A(val) (OCR3A = (val))
|
||||
#define SET_COMPARE_B(val) (OCR3B = (val))
|
||||
#define CAPTURE_INTERRUPT TIMER3_CAPT_vect
|
||||
#define COMPARE_A_INTERRUPT TIMER3_COMPA_vect
|
||||
#define COMPARE_B_INTERRUPT TIMER3_COMPB_vect
|
||||
|
||||
|
||||
#elif defined(ALTSS_USE_TIMER4)
|
||||
#define CONFIG_TIMER_NOPRESCALE() (TIMSK4 = 0, TCCR4A = 0, TCCR4B = (1<<ICNC4) | (1<<CS40))
|
||||
#define CONFIG_TIMER_PRESCALE_8() (TIMSK4 = 0, TCCR4A = 0, TCCR4B = (1<<ICNC4) | (1<<CS41))
|
||||
#define CONFIG_MATCH_NORMAL() (TCCR4A = TCCR4A & ~((1<<COM4A1) | (1<<COM4A0)))
|
||||
#define CONFIG_MATCH_TOGGLE() (TCCR4A = (TCCR4A & ~(1<<COM4A1)) | (1<<COM4A0))
|
||||
#define CONFIG_MATCH_CLEAR() (TCCR4A = (TCCR4A | (1<<COM4A1)) & ~(1<<COM4A0))
|
||||
#define CONFIG_MATCH_SET() (TCCR4A = TCCR4A | ((1<<COM4A1) | (1<<COM4A0)))
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR4B &= ~(1<<ICES4))
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (TCCR4B |= (1<<ICES4))
|
||||
#define ENABLE_INT_INPUT_CAPTURE() (TIFR4 = (1<<ICF4), TIMSK4 = (1<<ICIE4))
|
||||
#define ENABLE_INT_COMPARE_A() (TIFR4 = (1<<OCF4A), TIMSK4 |= (1<<OCIE4A))
|
||||
#define ENABLE_INT_COMPARE_B() (TIFR4 = (1<<OCF4B), TIMSK4 |= (1<<OCIE4B))
|
||||
#define DISABLE_INT_INPUT_CAPTURE() (TIMSK4 &= ~(1<<ICIE4))
|
||||
#define DISABLE_INT_COMPARE_A() (TIMSK4 &= ~(1<<OCIE4A))
|
||||
#define DISABLE_INT_COMPARE_B() (TIMSK4 &= ~(1<<OCIE4B))
|
||||
#define GET_TIMER_COUNT() (TCNT4)
|
||||
#define GET_INPUT_CAPTURE() (ICR4)
|
||||
#define GET_COMPARE_A() (OCR4A)
|
||||
#define GET_COMPARE_B() (OCR4B)
|
||||
#define SET_COMPARE_A(val) (OCR4A = (val))
|
||||
#define SET_COMPARE_B(val) (OCR4B = (val))
|
||||
#define CAPTURE_INTERRUPT TIMER4_CAPT_vect
|
||||
#define COMPARE_A_INTERRUPT TIMER4_COMPA_vect
|
||||
#define COMPARE_B_INTERRUPT TIMER4_COMPB_vect
|
||||
#define CONFIG_TIMER_NOPRESCALE() (TIMSK4 = 0, TCCR4A = 0, TCCR4B = (1<<ICNC4) | (1<<CS40))
|
||||
#define CONFIG_TIMER_PRESCALE_8() (TIMSK4 = 0, TCCR4A = 0, TCCR4B = (1<<ICNC4) | (1<<CS41))
|
||||
#define CONFIG_MATCH_NORMAL() (TCCR4A = TCCR4A & ~((1<<COM4A1) | (1<<COM4A0)))
|
||||
#define CONFIG_MATCH_TOGGLE() (TCCR4A = (TCCR4A & ~(1<<COM4A1)) | (1<<COM4A0))
|
||||
#define CONFIG_MATCH_CLEAR() (TCCR4A = (TCCR4A | (1<<COM4A1)) & ~(1<<COM4A0))
|
||||
#define CONFIG_MATCH_SET() (TCCR4A = TCCR4A | ((1<<COM4A1) | (1<<COM4A0)))
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR4B &= ~(1<<ICES4))
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (TCCR4B |= (1<<ICES4))
|
||||
#define ENABLE_INT_INPUT_CAPTURE() (TIFR4 = (1<<ICF4), TIMSK4 = (1<<ICIE4))
|
||||
#define ENABLE_INT_COMPARE_A() (TIFR4 = (1<<OCF4A), TIMSK4 |= (1<<OCIE4A))
|
||||
#define ENABLE_INT_COMPARE_B() (TIFR4 = (1<<OCF4B), TIMSK4 |= (1<<OCIE4B))
|
||||
#define DISABLE_INT_INPUT_CAPTURE() (TIMSK4 &= ~(1<<ICIE4))
|
||||
#define DISABLE_INT_COMPARE_A() (TIMSK4 &= ~(1<<OCIE4A))
|
||||
#define DISABLE_INT_COMPARE_B() (TIMSK4 &= ~(1<<OCIE4B))
|
||||
#define GET_TIMER_COUNT() (TCNT4)
|
||||
#define GET_INPUT_CAPTURE() (ICR4)
|
||||
#define GET_COMPARE_A() (OCR4A)
|
||||
#define GET_COMPARE_B() (OCR4B)
|
||||
#define SET_COMPARE_A(val) (OCR4A = (val))
|
||||
#define SET_COMPARE_B(val) (OCR4B = (val))
|
||||
#define CAPTURE_INTERRUPT TIMER4_CAPT_vect
|
||||
#define COMPARE_A_INTERRUPT TIMER4_COMPA_vect
|
||||
#define COMPARE_B_INTERRUPT TIMER4_COMPB_vect
|
||||
|
||||
|
||||
#elif defined(ALTSS_USE_TIMER5)
|
||||
#define CONFIG_TIMER_NOPRESCALE() (TIMSK5 = 0, TCCR5A = 0, TCCR5B = (1<<ICNC5) | (1<<CS50))
|
||||
#define CONFIG_TIMER_PRESCALE_8() (TIMSK5 = 0, TCCR5A = 0, TCCR5B = (1<<ICNC5) | (1<<CS51))
|
||||
#define CONFIG_MATCH_NORMAL() (TCCR5A = TCCR5A & ~((1<<COM5A1) | (1<<COM5A0)))
|
||||
#define CONFIG_MATCH_TOGGLE() (TCCR5A = (TCCR5A & ~(1<<COM5A1)) | (1<<COM5A0))
|
||||
#define CONFIG_MATCH_CLEAR() (TCCR5A = (TCCR5A | (1<<COM5A1)) & ~(1<<COM5A0))
|
||||
#define CONFIG_MATCH_SET() (TCCR5A = TCCR5A | ((1<<COM5A1) | (1<<COM5A0)))
|
||||
#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR5B &= ~(1<<ICES5))
|
||||
#define CONFIG_CAPTURE_RISING_EDGE() (TCCR5B |= (1<<ICES5))
|
||||
#define ENABLE_INT_INPUT_CAPTURE() (TIFR5 = (1<<ICF5), TIMSK5 = (1<<ICIE5))
|
||||
#define ENABLE_INT_COMPARE_A() (TIFR5 = (1<<OCF5A), TIMSK5 |= (1<<OCIE5A))
|
||||
#define ENABLE_INT_COMPARE_B() (TIFR5 = (1<<OCF5B), TIMSK5 |= (1<<OCIE5B))
|
||||
#define DISABLE_INT_INPUT_CAPTURE() (TIMSK5 &= ~(1<<ICIE5))
|
||||
#define DISABLE_INT_COMPARE_A() (TIMSK5 &= ~(1<<OCIE5A))
|
||||
#define DISABLE_INT_COMPARE_B() (TIMSK5 &= ~(1<<OCIE5B))
|
||||
#define GET_TIMER_COUNT() (TCNT5)
|
||||
#define GET_INPUT_CAPTURE() (ICR5)
|
||||
#define GET_COMPARE_A() (OCR5A)
|
||||
#define GET_COMPARE_B() (OCR5B)
|
||||
#define SET_COMPARE_A(val) (OCR5A = (val))
|
||||
#define SET_COMPARE_B(val) (OCR5B = (val))
|
||||
#define CAPTURE_INTERRUPT TIMER5_CAPT_vect
|
||||
#define COMPARE_A_INTERRUPT TIMER5_COMPA_vect
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#define COMPARE_B_INTERRUPT TIMER5_COMPB_vect
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#define CONFIG_TIMER_NOPRESCALE() (TIMSK5 = 0, TCCR5A = 0, TCCR5B = (1<<ICNC5) | (1<<CS50))
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#define CONFIG_TIMER_PRESCALE_8() (TIMSK5 = 0, TCCR5A = 0, TCCR5B = (1<<ICNC5) | (1<<CS51))
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#define CONFIG_MATCH_NORMAL() (TCCR5A = TCCR5A & ~((1<<COM5A1) | (1<<COM5A0)))
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#define CONFIG_MATCH_TOGGLE() (TCCR5A = (TCCR5A & ~(1<<COM5A1)) | (1<<COM5A0))
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#define CONFIG_MATCH_CLEAR() (TCCR5A = (TCCR5A | (1<<COM5A1)) & ~(1<<COM5A0))
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#define CONFIG_MATCH_SET() (TCCR5A = TCCR5A | ((1<<COM5A1) | (1<<COM5A0)))
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#define CONFIG_CAPTURE_FALLING_EDGE() (TCCR5B &= ~(1<<ICES5))
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||||
#define CONFIG_CAPTURE_RISING_EDGE() (TCCR5B |= (1<<ICES5))
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||||
#define ENABLE_INT_INPUT_CAPTURE() (TIFR5 = (1<<ICF5), TIMSK5 = (1<<ICIE5))
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#define ENABLE_INT_COMPARE_A() (TIFR5 = (1<<OCF5A), TIMSK5 |= (1<<OCIE5A))
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||||
#define ENABLE_INT_COMPARE_B() (TIFR5 = (1<<OCF5B), TIMSK5 |= (1<<OCIE5B))
|
||||
#define DISABLE_INT_INPUT_CAPTURE() (TIMSK5 &= ~(1<<ICIE5))
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||||
#define DISABLE_INT_COMPARE_A() (TIMSK5 &= ~(1<<OCIE5A))
|
||||
#define DISABLE_INT_COMPARE_B() (TIMSK5 &= ~(1<<OCIE5B))
|
||||
#define GET_TIMER_COUNT() (TCNT5)
|
||||
#define GET_INPUT_CAPTURE() (ICR5)
|
||||
#define GET_COMPARE_A() (OCR5A)
|
||||
#define GET_COMPARE_B() (OCR5B)
|
||||
#define SET_COMPARE_A(val) (OCR5A = (val))
|
||||
#define SET_COMPARE_B(val) (OCR5B = (val))
|
||||
#define CAPTURE_INTERRUPT TIMER5_CAPT_vect
|
||||
#define COMPARE_A_INTERRUPT TIMER5_COMPA_vect
|
||||
#define COMPARE_B_INTERRUPT TIMER5_COMPB_vect
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user