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MYSBootloader 1.1

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Enhancements: static parent, bootloader commands, updated delay funtion
for more precise timing and minor improvements
This commit is contained in:
tekka
2015-03-14 13:46:24 +01:00
parent c83d8d62b3
commit 9b41d2a8e6
6 changed files with 1149 additions and 272 deletions
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MYSBootloader/MYSBootloader.c
+120 -89
View File
@@ -1,17 +1,15 @@
/* /*
MYSBootloader: OTA bootloader for Mysensor nodes (www.mysensors.org) MYSBootloader: OTA bootloader for Mysensor nodes (www.mysensors.org)
Code based on OTA bootloader by ToSa Original OTA bootloader code by ToSa
Optimized and extended by tekka Optimized and extended by tekka
Version 1.0 / 20150206 Version 1.1 / 20150314
Size: 1834 bytes Size: 2002 bytes
Tested with Atmega328P, 16Mhz 3.3V and 5V and MYSController 0.1.2.266 (goo.gl/9DCWNo) Tested with MYSController 0.1.2.276 (goo.gl/9DCWNo)
MCU: atmega328 MCU: Atmega328p
clock: 16Mhz (prescaler: off/1)
bootsz: 1024W bootsz: 1024W
fuses for ISP: fuses for ISP:
EX = 0xFE (use 0x06 for Arduino IDE, boards.txt) EX = 0xFE (use 0x06 for Arduino IDE, boards.txt)
HI = 0xDA HI = 0xDA
@@ -23,9 +21,20 @@
Successfully tested with: Successfully tested with:
16Mhz extXTAL, 3.3V 16Mhz extXTAL, 3.3V & 5V
1Mhz intRC (8Mhz + DIV8), 3.3V 8Mhz intRC, 3.3V & 5V
128kHz intRC, 3.3V 1Mhz intRC, 3.3 & 5V
128kHz intRC, 3.3V & 5V
* Version 1.1
- use eeprom_update instead of eeprom_write to reduce wear out
- bootloader commands: erase eeprom, set node id
- verify incoming FW blocks for type & address
- communicate over static parent (if set and found) else broadcast to find nearest node
- adjusted timings
* Version 1.0
Initial release
This program is free software; you can redistribute it and/or This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License modify it under the terms of the GNU General Public License
@@ -36,45 +45,63 @@
#define MYSBOOTLOADER_MAJVER 1 #define MYSBOOTLOADER_MAJVER 1
#define MYSBOOTLOADER_MINVER 0 #define MYSBOOTLOADER_MINVER 1
#define MYSBOOTLOADER_VERSION (MYSBOOTLOADER_MINVER * 256 + MYSBOOTLOADER_MAJVER) #define MYSBOOTLOADER_VERSION (MYSBOOTLOADER_MINVER * 256 + MYSBOOTLOADER_MAJVER)
//#define USE_PRESCALER
#define MAX_RESEND 5 #define MAX_RESEND 5
// procedures and functions // procedures and functions
int main(void) __attribute__ ((OS_main)) __attribute__ ((section (".init9"))); static void programPage(uint16_t page, uint8_t *buf);
static uint16_t calcCRCrom (const void* ptr, uint16_t len); static uint16_t calcCRCrom (const void* ptr, uint16_t len);
static uint8_t IsFirmwareValid(); static uint8_t IsFirmwareValid();
static void reboot(); static void reboot();
static void startup(); static void startup();
static void programPage(uint32_t page, uint8_t *buf);
static boolean sendWrite(MyMessage message); static boolean sendWrite(MyMessage message);
static bool sendAndWait(uint8_t reqType, uint8_t resType); static bool sendAndWait(uint8_t reqType, uint8_t resType);
int main(void) __attribute__ ((OS_main)) __attribute__ ((section (".init9")));
static void programPage(uint16_t page, uint8_t *buf) {
// these function calls use "out" commands: save some bytes and cycles :)
__boot_page_erase_short(page);
boot_spm_busy_wait();
for (uint16_t i = 0; i < SPM_PAGESIZE; i += 2) {
uint16_t data_word = *buf++;
data_word += (*buf++) << 8;
__boot_page_fill_short(page + i, data_word);
}
__boot_page_write_short(page);
boot_spm_busy_wait();
__boot_rww_enable_short();
}
static uint16_t calcCRCrom (const void* ptr, uint16_t len) { static uint16_t calcCRCrom (const void* ptr, uint16_t len) {
// init 0xFFFF // init 0xFFFF
uint16_t crc = ~0; uint16_t crc = ~0;
for (uint16_t i = 0; i < len; ++i) { for (uint16_t i = 0; i < len; i++) {
crc = _crc16_update(crc, pgm_read_byte((uint16_t) ptr + i)); crc = _crc16_update(crc, pgm_read_byte((uint16_t) ptr + i));
} }
return crc; return crc;
} }
static uint8_t IsFirmwareValid () { static uint8_t IsFirmwareValid () {
return calcCRCrom(0, fc.blocks * FIRMWARE_BLOCK_SIZE) == fc.crc; return calcCRCrom(0, fc.blocks * FIRMWARE_BLOCK_SIZE) == fc.crc;
} }
static void reboot() { static void reboot() {
// any pending eeprom activities? // wait for pending eeprom activities
eeprom_busy_wait(); eeprom_busy_wait();
// trigger watchdog ASAP // trigger watchdog ASAP
watchdogConfig(WATCHDOG_16MS); watchdogConfig(WATCHDOG_16MS);
// wait until WD triggers // endless loop
while (1); while (1);
} }
@@ -82,13 +109,7 @@ static void startup() {
if (IsFirmwareValid()) { if (IsFirmwareValid()) {
// WD off // WD off
watchdogConfig(WATCHDOG_OFF); watchdogConfig(WATCHDOG_OFF);
// run sketch
#ifdef USE_PRESCALER
// reset prescaler
clock_prescale_set(orgClockDiv);
#endif
// start sketch
((void(*)()) 0)(); ((void(*)()) 0)();
} else { } else {
@@ -96,20 +117,7 @@ static void startup() {
} }
} }
static void programPage(uint32_t page, uint8_t *buf) {
// using out commands, saves some bytes :)
__boot_page_erase_short(page);
boot_spm_busy_wait();
for (uint16_t i = 0; i < SPM_PAGESIZE; i += 2) {
uint16_t w = *buf++;
// generate word
w += (*buf++) << 8;
__boot_page_fill_short(page + i, w);
}
__boot_page_write_short(page);
boot_spm_busy_wait();
__boot_rww_enable_short();
}
static boolean sendWrite(MyMessage message) { static boolean sendWrite(MyMessage message) {
@@ -121,38 +129,45 @@ static bool sendAndWait(uint8_t reqType, uint8_t resType) {
// outer loop, retries // outer loop, retries
for (uint8_t i = 0; i < MAX_RESEND; i++) { for (uint8_t i = 0; i < MAX_RESEND; i++) {
sendWrite(outMsg); sendWrite(outMsg);
// loop 20 times, wait time 0.1ms if no/wrong data => 2s // loop 20 times, wait time 0.1s if no/wrong data => 2s
for (uint8_t j = 0; j < 20; j++) { for (uint8_t j = 0; j < 20; j++) {
// loop 100 times, wait 1ms if no/wrong data => 0.1s // loop 100 times, wait 1ms if no/wrong data => 0.1s
for (uint8_t k = 0; k < 100; k++) { for (uint8_t k = 0; k < 100; k++) {
watchdogReset(); watchdogReset();
// Tx FIFO data available? (we don't care about the pipe here) // Tx FIFO data available? (we don't care about the pipe here)
if (available(NULL)) { if (available(NULL)) {
// read message from FIFO // read message from FIFO, skip if size = 0
readMessage(inMsg.array); if (readMessage(inMsg.array) > 0) {
// protocol compatible? if not ignore msg // protocol compatible? if not ignore msg
if ((mGetVersion(inMsg) != PROTOCOL_VERSION)) { if ((mGetVersion(inMsg) != PROTOCOL_VERSION)) {
continue; continue;
} }
if (inMsg.destination == nc.nodeId) { // msg for us?
// msg for us if (inMsg.destination == nc.nodeId) {
if ((mGetCommand(inMsg) == C_INTERNAL) && (inMsg.type == I_FIND_PARENT_RESPONSE)) { // internal command: find parent
if (inMsg.bValue < nc.distance - 1) { if ((mGetCommand(inMsg) == C_INTERNAL) && (inMsg.type == I_FIND_PARENT_RESPONSE)) {
// got new routing info, update settings // static parent found?
nc.distance = inMsg.bValue + 1; if (configuredParentID == inMsg.sender) {
nc.parentNodeId = inMsg.sender; configuredParentFound = true;
}
if ( ((inMsg.bValue < nc.distance - 1) && ( !configuredParentFound) ) || (configuredParentID == inMsg.sender)) {
// got new routing info, update settings
nc.distance = inMsg.bValue + 1;
nc.parentNodeId = inMsg.sender;
}
}
// did we receive expected reply?
if ((mGetCommand(inMsg) == mGetCommand(outMsg)) && (inMsg.type == resType)) {
return true;
} }
}
// did we receive expected reply?
if ((mGetCommand(inMsg) == mGetCommand(outMsg)) && (inMsg.type == resType)) {
return true;
}
}
} }
} else { } else {
// wait 1ms if no data available // wait 1ms if no data available
delaym(10); _delay_ms(1);
} }
} }
} }
} }
@@ -169,13 +184,6 @@ int main(void) {
// reset MCU status register // reset MCU status register
MCUSR = 0; MCUSR = 0;
#ifdef USE_PRESCALER
// get current prescale
orgClockDiv = clock_prescale_get();
//switch to 4 MHz on 16Mhz crystal
clock_prescale_set(F_CPU_DIV);
#endif
// enable watchdog to avoid deadlock // enable watchdog to avoid deadlock
watchdogConfig(WATCHDOG_8S); watchdogConfig(WATCHDOG_8S);
@@ -190,11 +198,10 @@ int main(void) {
// Read firmware config from EEPROM, i.e. type, version, CRC, blocks // Read firmware config from EEPROM, i.e. type, version, CRC, blocks
eeprom_read_block((void*)&fc, (void*)EEPROM_FIRMWARE_TYPE_ADDRESS, sizeof(NodeFirmwareConfig)); eeprom_read_block((void*)&fc, (void*)EEPROM_FIRMWARE_TYPE_ADDRESS, sizeof(NodeFirmwareConfig));
// bootloader should find closest node during each reboot // find nearest node during reboot: invalidate parent node settings, since we have to re-discover them for every single reboot
configuredParentID = nc.parentNodeId;
// invalidate parent node settings, since we have to re-discover them for every single reboot // nc.parentNodeId = 0xFF;
nc.distance = 0xFF; nc.distance = 0xFF;
nc.parentNodeId = 0xFF;
// prepare for I_FIND_PARENTS // prepare for I_FIND_PARENTS
outMsg.sender = nc.nodeId; outMsg.sender = nc.nodeId;
@@ -202,6 +209,7 @@ int main(void) {
outMsg.sensor = 0xFF; outMsg.sensor = 0xFF;
outMsg.destination = BROADCAST_ADDRESS; outMsg.destination = BROADCAST_ADDRESS;
// set header
mSetVersion(outMsg, PROTOCOL_VERSION); mSetVersion(outMsg, PROTOCOL_VERSION);
mSetLength(outMsg, 0); mSetLength(outMsg, 0);
mSetCommand(outMsg, C_INTERNAL); mSetCommand(outMsg, C_INTERNAL);
@@ -211,7 +219,7 @@ int main(void) {
// set reading & writing pipe address // set reading & writing pipe address
setAddress(nc.nodeId); setAddress(nc.nodeId);
// network up?, get neighbors, else startup // network up? get neighbors, else startup
if (!sendAndWait(I_FIND_PARENT, I_FIND_PARENT_RESPONSE)) { if (!sendAndWait(I_FIND_PARENT, I_FIND_PARENT_RESPONSE)) {
startup(); startup();
} }
@@ -225,9 +233,9 @@ int main(void) {
openReadingPipe(CURRENT_NODE_PIPE, TO_ADDR(BROADCAST_ADDRESS)); openReadingPipe(CURRENT_NODE_PIPE, TO_ADDR(BROADCAST_ADDRESS));
if (sendAndWait(I_ID_REQUEST, I_ID_RESPONSE)) { if (sendAndWait(I_ID_REQUEST, I_ID_RESPONSE)) {
// save id to eeprom // save id to eeprom
eeprom_write_byte((uint8_t*)EEPROM_NODE_ID_ADDRESS, atoi(inMsg.data)); eeprom_update_byte((uint8_t*)EEPROM_NODE_ID_ADDRESS, atoi(inMsg.data));
} }
// we could go on and set everything right here, but rebooting will take care of that - saves bytes :) // we could go on and set everything right here, but rebooting will take care of that - and saves some bytes :)
reboot(); reboot();
} }
@@ -250,6 +258,23 @@ int main(void) {
NodeFirmwareConfig *firmwareConfigResponse = (NodeFirmwareConfig *)inMsg.data; NodeFirmwareConfig *firmwareConfigResponse = (NodeFirmwareConfig *)inMsg.data;
// bootloader commands
if (firmwareConfigResponse->blocks == 0) {
// verify flag
if (firmwareConfigResponse->crc == 0xDA7A){
// cmd 0x01 clear eeprom
if(firmwareConfigResponse->bl_command == 0x01) {
for(uint16_t i = 0; i < EEPROM_SIZE; i++) eeprom_update_byte((uint8_t *)i,0xFF);
} else
// cmd 0x02 set id
if(firmwareConfigResponse->bl_command == 0x02) {
eeprom_update_byte((uint8_t*)EEPROM_NODE_ID_ADDRESS, (uint8_t)firmwareConfigResponse->bl_data);
}
}
// final step
reboot();
}
// compare with current node configuration, if equal startup // compare with current node configuration, if equal startup
if (!memcmp(&fc,firmwareConfigResponse,sizeof(NodeFirmwareConfig))) { if (!memcmp(&fc,firmwareConfigResponse,sizeof(NodeFirmwareConfig))) {
startup(); startup();
@@ -260,7 +285,7 @@ int main(void) {
// invalidate current CRC // invalidate current CRC
fc.crc = 0xFFFF; fc.crc = 0xFFFF;
// write fetched type and version in case OTA fails (BL will reboot and re-request FW with stored settings) // write fetched type and version in case OTA fails (BL will reboot and re-request FW with stored settings)
eeprom_write_block(&fc, (void*)EEPROM_FIRMWARE_TYPE_ADDRESS,sizeof(NodeFirmwareConfig)); eeprom_update_block(&fc, (void*)EEPROM_FIRMWARE_TYPE_ADDRESS,sizeof(NodeFirmwareConfig));
// copy new FW config // copy new FW config
memcpy(&fc,firmwareConfigResponse,sizeof(NodeFirmwareConfig)); memcpy(&fc,firmwareConfigResponse,sizeof(NodeFirmwareConfig));
@@ -270,33 +295,39 @@ int main(void) {
firmwareRequest->type = fc.type; firmwareRequest->type = fc.type;
firmwareRequest->version = fc.version; firmwareRequest->version = fc.version;
// request FW from controller // request FW from controller, load FW counting backwards
for (uint16_t block = fc.blocks; block > 0; block--) { uint16_t block = fc.blocks;
firmwareRequest->block = (block - 1); do {
firmwareRequest->block = block - 1;
// request FW block // request FW block
if (!sendAndWait(ST_FIRMWARE_REQUEST, ST_FIRMWARE_RESPONSE)) { if (!sendAndWait(ST_FIRMWARE_REQUEST, ST_FIRMWARE_RESPONSE)) {
reboot(); reboot();
} }
ReplyFWBlock *firmwareResponse = (ReplyFWBlock *)inMsg.data; ReplyFWBlock *firmwareResponse = (ReplyFWBlock *)inMsg.data;
// calculate page offset
uint8_t offset = ((block - 1) * FIRMWARE_BLOCK_SIZE) % SPM_PAGESIZE; // did we receive requested block?
// write to buffer if (!memcmp(firmwareRequest,firmwareResponse,sizeof(RequestFWBlock))) {
memcpy(progBuf + offset, firmwareResponse->data, FIRMWARE_BLOCK_SIZE); // calculate page offset
// program if page full uint8_t offset = ((block - 1) * FIRMWARE_BLOCK_SIZE) % SPM_PAGESIZE;
if (offset == 0) { // write to buffer
programPage(((block - 1) * FIRMWARE_BLOCK_SIZE), progBuf); memcpy(progBuf + offset, firmwareResponse->data, FIRMWARE_BLOCK_SIZE);
} // program if page full
} if (offset == 0) {
programPage(((block - 1) * FIRMWARE_BLOCK_SIZE), progBuf);
}
block--;
}
} while (block);
// wuff // wuff
watchdogReset(); watchdogReset();
// all blocks transmitted, calc CRC and write to eeprom if valid // all blocks transmitted, calc CRC and write to eeprom if valid
if (IsFirmwareValid()) { if (IsFirmwareValid()) {
// if FW is valid, write settings to eeprom // if FW is valid, write settings to eeprom
eeprom_write_block((void*)&fc, (void*)EEPROM_FIRMWARE_TYPE_ADDRESS, sizeof(NodeFirmwareConfig)); eeprom_update_block(&fc, (void*)EEPROM_FIRMWARE_TYPE_ADDRESS, sizeof(NodeFirmwareConfig));
// we could restart directly here, but eeprom may still be busy, thus reboot (we check for idle eeprom before rebooting) and save some bytes :)
} }
// final step // final step
reboot(); reboot();
MYSBootloader/MYSBootloader.h
+14 -6
View File
@@ -5,6 +5,7 @@
#include <stdint.h> #include <stdint.h>
#include <string.h> #include <string.h>
#include <util/crc16.h> #include <util/crc16.h>
#include <util/delay.h>
#include "MyMessage.h" #include "MyMessage.h"
#include "MySensor.h" #include "MySensor.h"
@@ -13,11 +14,17 @@
#define FIRMWARE_BLOCK_SIZE 16 #define FIRMWARE_BLOCK_SIZE 16
#define EEPROM_SIZE 1024 // 1024 bytes for ATMEGA328
// FW config structure, stored in eeprom
typedef struct { typedef struct {
uint16_t type; union {
uint16_t version; uint16_t type;
uint16_t bl_command;
};
union {
uint16_t version;
uint16_t bl_data
};
uint16_t blocks; uint16_t blocks;
uint16_t crc; uint16_t crc;
} __attribute__((packed)) NodeFirmwareConfig; } __attribute__((packed)) NodeFirmwareConfig;
@@ -48,9 +55,10 @@ static NodeFirmwareConfig fc;
static MyMessage outMsg; static MyMessage outMsg;
static MyMessage inMsg; static MyMessage inMsg;
#ifdef PRESCALE static boolean configuredParentFound = false;
static clock_div_t orgClockDiv = 0; static uint8_t configuredParentID = 0xFF;
#endif
//static clock_div_t orgClockDiv = 0;
static uint8_t progBuf[SPM_PAGESIZE]; static uint8_t progBuf[SPM_PAGESIZE];
MYSBootloader/MYSBootloader.hex
+126 -115
View File
@@ -1,117 +1,128 @@
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:107FC0001FBA20BD0FB6F894FA9AF99A0FBE089519
:027FD000FF00B0
:040000030000780081 :040000030000780081
:00000001FF :00000001FF
MYSBootloader/MYSBootloaderHW.h
+14 -33
View File
@@ -5,18 +5,10 @@
// hardware // hardware
#ifdef USE_PRESCALER
#define F_CPU_DIV clock_div_4 #define F_CPU_DIV clock_div_4
#else #define F_CPU_REAL F_CPU / (F_CPU_DIV)
#define F_CPU_DIV clock_div_1 #define BAUD_SETTING (( (F_CPU_REAL + BAUD_RATE * 4L) / ((BAUD_RATE * 8L))) - 1 )
#endif #define BAUD_ACTUAL (F_CPU_REAL/(8 * ((BAUD_SETTING)+1)))
#define F_CPU_REAL F_CPU / (1 << F_CPU_DIV)
#define DELAY_M 125 * (1 << F_CPU_DIV)
#define BAUD_SETTING (( (F_CPU + BAUD_RATE * 4L) / ((BAUD_RATE * 8L))) - 1 )
#define BAUD_ACTUAL (F_CPU/(8 * ((BAUD_SETTING)+1)))
#define BAUD_ERROR (( 100*(BAUD_RATE - BAUD_ACTUAL) ) / BAUD_RATE) #define BAUD_ERROR (( 100*(BAUD_RATE - BAUD_ACTUAL) ) / BAUD_RATE)
#define UART_SRA UCSR0A #define UART_SRA UCSR0A
#define UART_SRB UCSR0B #define UART_SRB UCSR0B
@@ -56,20 +48,6 @@ void watchdogConfig(uint8_t x) {
WDTCSR = x; WDTCSR = x;
} }
// delay procedures
inline static void delayu() {
asm volatile ("nop");
}
static void delaym(uint8_t value) {
for (uint8_t outer = 0; outer < value; outer++) {
for (uint16_t inner = 0; inner < DELAY_M; inner++) {
delayu();
}
}
}
// SPI communication // SPI communication
#define SPI_DDR DDRB #define SPI_DDR DDRB
@@ -80,10 +58,12 @@ static void delaym(uint8_t value) {
#define SPI_MOSI 3 // Arduino Pin 11 <-> Bit 3 of port B #define SPI_MOSI 3 // Arduino Pin 11 <-> Bit 3 of port B
#define SPI_CSN 2 // Arduino Pin 10 <-> Bit 2 of port B #define SPI_CSN 2 // Arduino Pin 10 <-> Bit 2 of port B
#define SPI_CE 1 // Arduino Pin 9 <-> Bit 1 of port B #define SPI_CE 1 // Arduino Pin 9 <-> Bit 1 of port B
#define csnlow() SPI_PORT &= ~_BV(SPI_CSN)//;delaym(1) // not necessary #define CE_PULSE_LENGTH 20 // IMPORTANT: minimum CE pulse width 10us, see nRF24L01 specs. Set 20us to be on the safe side
#define csnhigh() SPI_PORT |= _BV(SPI_CSN)//;delaym(1) // not necessary
#define celow() SPI_PORT &= ~_BV(SPI_CE)//;delaym(1) // not necessary #define csnlow() SPI_PORT &= ~_BV(SPI_CSN)
#define cehigh() SPI_PORT |= _BV(SPI_CE)//;delaym(1) // minimum puls width 10us #define csnhigh() SPI_PORT |= _BV(SPI_CSN)
#define celow() SPI_PORT &= ~_BV(SPI_CE)
#define cehigh() SPI_PORT |= _BV(SPI_CE)
static void SPIinit() { static void SPIinit() {
// set pin mode: MOSI,SCLK,CE = OUTPUT, MISO = INPUT // set pin mode: MOSI,SCLK,CE = OUTPUT, MISO = INPUT
@@ -91,15 +71,16 @@ static void SPIinit() {
} }
static uint8_t SPItransfer(uint8_t value) { static uint8_t SPItransfer(uint8_t value) {
for(uint8_t i = 0 ;i < 8;i++) { // bit bang SPI
for(uint8_t i = 0; i<8; i++) {
if (value & 0x80) SPI_PORT |= _BV(SPI_MOSI); else SPI_PORT &= ~_BV(SPI_MOSI); if (value & 0x80) SPI_PORT |= _BV(SPI_MOSI); else SPI_PORT &= ~_BV(SPI_MOSI);
delayu(); //_delay_us(1);
value <<= 1; value <<= 1;
SPI_PORT |= _BV(SPI_SCLK); SPI_PORT |= _BV(SPI_SCLK);
delayu(); //_delay_us(1);
value |= ((SPI_PIN >> SPI_MISO) & 0x01); value |= ((SPI_PIN >> SPI_MISO) & 0x01);
SPI_PORT &= ~_BV(SPI_SCLK); SPI_PORT &= ~_BV(SPI_SCLK);
delayu(); //_delay_us(1);
} }
return value; return value;
} }
MYSBootloader/MYSBootloaderRF24.h
+27 -29
View File
@@ -9,12 +9,11 @@ typedef enum { RF24_1MBPS = 0, RF24_2MBPS, RF24_250KBPS } rf24_datarate_e;
#define _write_register(reg) ( (reg) | W_REGISTER) #define _write_register(reg) ( (reg) | W_REGISTER)
#define _read_register(reg) ( (reg) | R_REGISTER) #define _read_register(reg) ( (reg) | R_REGISTER)
#define addr_width 5 #define addr_width 5
uint64_t pipe0_reading_address = 0; uint64_t pipe0_reading_address = 0;
static uint8_t BurstReadAddress(uint8_t addr, uint8_t* buf, uint8_t len) {
uint8_t BurstReadAddress(uint8_t addr, uint8_t* buf, uint8_t len) {
csnlow(); csnlow();
uint8_t status = SPItransfer( addr ); uint8_t status = SPItransfer( addr );
while ( len-- ) { while ( len-- ) {
@@ -25,7 +24,7 @@ uint8_t BurstReadAddress(uint8_t addr, uint8_t* buf, uint8_t len) {
return status; return status;
} }
uint8_t BurstWriteAddress(uint8_t addr, uint8_t* buf, uint8_t len) { static uint8_t BurstWriteAddress(uint8_t addr, uint8_t* buf, uint8_t len) {
csnlow(); csnlow();
uint8_t status = SPItransfer( addr ); uint8_t status = SPItransfer( addr );
while ( len-- ) { while ( len-- ) {
@@ -35,30 +34,30 @@ uint8_t BurstWriteAddress(uint8_t addr, uint8_t* buf, uint8_t len) {
return status; return status;
} }
uint8_t ReadAddress(uint8_t addr) { static uint8_t ReadAddress(uint8_t addr) {
return BurstReadAddress(addr,NULL,1); return BurstReadAddress(addr,NULL,1);
} }
uint8_t WriteAddress(uint8_t addr, uint8_t val) { static uint8_t WriteAddress(uint8_t addr, uint8_t val) {
return BurstWriteAddress(addr,&val,1); return BurstWriteAddress(addr,&val,1);
} }
#define BurstWriteRegister(reg,buf,len) BurstWriteAddress(_write_register(reg),buf,len) #define BurstWriteRegister(reg,buf,len) BurstWriteAddress(_write_register(reg), buf, len)
#define WriteRegister(reg,val) WriteAddress(_write_register(reg),val) #define WriteRegister(reg,val) WriteAddress(_write_register(reg), val)
#define BurstReadRegister(reg,buf,len) BurstReadAddress(_read_register(reg),buf,len) #define BurstReadRegister(reg,buf,len) BurstReadAddress(_read_register(reg), buf, len)
#define ReadRegister(reg) ReadAddress(_read_register(reg)) #define ReadRegister(reg) ReadAddress(_read_register(reg))
#define get_status() BurstReadAddress(NOP,NULL,0) #define get_status() BurstReadAddress(NOP, NULL, 0)
void Flush_RX(void) { void Flush_RX(void) {
BurstWriteAddress(FLUSH_RX,NULL,0); BurstWriteAddress(FLUSH_RX, NULL, 0);
} }
void Flush_TX(void) { void Flush_TX(void) {
BurstWriteAddress(FLUSH_TX,NULL,0); BurstWriteAddress(FLUSH_TX, NULL, 0);
} }
void Flush_RXTX_CLI(void) { static void Flush_RXTX_CLI(void) {
// flush RX and TX buffer // flush RX and TX buffer
Flush_RX(); Flush_RX();
Flush_TX(); Flush_TX();
@@ -86,18 +85,18 @@ static void stopListening(void) {
static bool write_buf(uint8_t* buf, uint8_t len, const bool multicast ) { static boolean write_buf(uint8_t* buf, uint8_t len, const bool multicast ) {
// write payload to FIFO // write payload to FIFO
BurstWriteRegister( multicast ? W_TX_PAYLOAD_NO_ACK : W_TX_PAYLOAD, buf, len) ; BurstWriteRegister( multicast ? W_TX_PAYLOAD_NO_ACK : W_TX_PAYLOAD, buf, len) ;
// CE pulse to start transmission // CE pulse to start transmission
cehigh(); cehigh();
// IMPORTANT: minimum CE pulse width 10us, see nRF24L01 specs // IMPORTANT: minimum CE pulse width 10us, see nRF24L01 specs
delaym(1); _delay_us(CE_PULSE_LENGTH);
// start transmitting // start transmitting
celow(); celow();
// wait until sent, here we potentially have a deadlock when transmitter not connected/not working // wait until sent or ACKed, here we potentially have a deadlock when transmitter not connected/not working => wdt recovers
while( ! ( get_status() & ( _BV(TX_DS) | _BV(MAX_RT) ))) { } while( ! ( get_status() & ( _BV(TX_DS) | _BV(MAX_RT) ))) { }
// read interrupts and clear // read interrupts and clear
uint8_t status = WriteRegister(STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) ); uint8_t status = WriteRegister(STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
@@ -119,7 +118,7 @@ static uint8_t getDynamicPayloadSize(void) {
} }
static bool available(uint8_t* pipe_num) { static boolean available(uint8_t* pipe_num) {
if (!(ReadAddress(FIFO_STATUS) & _BV(RX_EMPTY) )){ if (!(ReadAddress(FIFO_STATUS) & _BV(RX_EMPTY) )){
if (pipe_num) { if (pipe_num) {
uint8_t status = get_status(); uint8_t status = get_status();
@@ -131,11 +130,13 @@ static bool available(uint8_t* pipe_num) {
} }
static void readMessage(uint8_t* buf) { static uint8_t readMessage(uint8_t* buf) {
// read payload // read payload
BurstReadRegister(R_RX_PAYLOAD,buf,getDynamicPayloadSize()); uint8_t PL_LEN = getDynamicPayloadSize();
BurstReadRegister(R_RX_PAYLOAD,buf,PL_LEN);
// reset interrupts // reset interrupts
WriteRegister(STATUS,_BV(RX_DR) | _BV(MAX_RT) | _BV(TX_DS)); WriteRegister(STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
return PL_LEN;
} }
static void openWritingPipe(uint64_t value) { static void openWritingPipe(uint64_t value) {
@@ -162,7 +163,7 @@ static void openReadingPipe(uint8_t pipe, uint64_t address) {
static boolean write(uint8_t destination, uint8_t* buf, uint8_t len, boolean multicast) { static boolean write(uint8_t destination, uint8_t* buf, uint8_t len, boolean multicast) {
stopListening(); stopListening();
openWritingPipe(TO_ADDR(destination)); openWritingPipe(TO_ADDR(destination));
bool result = write_buf(buf, len, multicast); boolean result = write_buf(buf, len, multicast);
startListening(); startListening();
return result; return result;
} }
@@ -177,6 +178,8 @@ static void setAddress(uint8_t addr)
} }
} }
static void RFinit(void){ static void RFinit(void){
// set address width // set address width
WriteRegister(SETUP_AW, (addr_width-2) % 4); WriteRegister(SETUP_AW, (addr_width-2) % 4);
@@ -190,7 +193,7 @@ static void RFinit(void){
WriteRegister(RF_SETUP, ((RF24_DATARATE & 0b00000010 ) << 4) | ((RF24_DATARATE & 0b00000001 ) << 3) | ((RF24_PA_LEVEL << 1) + 1)); WriteRegister(RF_SETUP, ((RF24_DATARATE & 0b00000010 ) << 4) | ((RF24_DATARATE & 0b00000001 ) << 3) | ((RF24_PA_LEVEL << 1) + 1));
// flush RX and TX FIFO, clear interrupts // flush RX and TX FIFO, clear interrupts
Flush_RXTX_CLI(); Flush_RXTX_CLI();
// activate dynamic payload feature // activate to unlock features
WriteAddress(ACTIVATE,0x73); WriteAddress(ACTIVATE,0x73);
// enable payload with ACK and dynamic payload length // enable payload with ACK and dynamic payload length
WriteRegister(FEATURE, _BV(EN_ACK_PAY) | _BV(EN_DPL) ); WriteRegister(FEATURE, _BV(EN_ACK_PAY) | _BV(EN_DPL) );
@@ -198,13 +201,8 @@ static void RFinit(void){
WriteRegister(DYNPD, _BV(DPL_P5) | _BV(DPL_P4) | _BV(DPL_P3) | _BV(DPL_P2) | _BV(DPL_P1) | _BV(DPL_P0)); WriteRegister(DYNPD, _BV(DPL_P5) | _BV(DPL_P4) | _BV(DPL_P3) | _BV(DPL_P2) | _BV(DPL_P1) | _BV(DPL_P0));
//powerUp, enable 16bit CRC, no RX mode //powerUp, enable 16bit CRC, no RX mode
WriteRegister(CONFIG, _BV(PWR_UP) | _BV(CRCO) | _BV(EN_CRC) | ~_BV(PRIM_RX)); WriteRegister(CONFIG, _BV(PWR_UP) | _BV(CRCO) | _BV(EN_CRC) | ~_BV(PRIM_RX));
// stabilize // stabilize 5ms
delaym(5); _delay_ms(5);
// We are not listening to broadcast pipe since we do not reply to broadcasting messages (e.g. FIND_PARENT_RESPONSE messages)
// openReadingPipe(BROADCAST_PIPE, TO_ADDR(BROADCAST_ADDRESS));
} }
#endif // MYSBootloaderRF24_H #endif // MYSBootloaderRF24_H
MYSBootloader/boot.h
+848
View File
@@ -0,0 +1,848 @@
/* Modified to use out for SPM access
** Peter Knight, Optiboot project http://optiboot.googlecode.com
**
** Todo: Tidy up
**
** "_short" routines execute 1 cycle faster and use 1 less word of flash
** by using "out" instruction instead of "sts".
**
** Additional elpm variants that trust the value of RAMPZ
*/
/* Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007 Eric B. Weddington
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of the copyright holders nor the names of
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
/* $Id: boot.h,v 1.27.2.3 2008/09/30 13:58:48 arcanum Exp $ */
#ifndef _AVR_BOOT_H_
#define _AVR_BOOT_H_ 1
/** \file */
/** \defgroup avr_boot <avr/boot.h>: Bootloader Support Utilities
\code
#include <avr/io.h>
#include <avr/boot.h>
\endcode
The macros in this module provide a C language interface to the
bootloader support functionality of certain AVR processors. These
macros are designed to work with all sizes of flash memory.
Global interrupts are not automatically disabled for these macros. It
is left up to the programmer to do this. See the code example below.
Also see the processor datasheet for caveats on having global interrupts
enabled during writing of the Flash.
\note Not all AVR processors provide bootloader support. See your
processor datasheet to see if it provides bootloader support.
\todo From email with Marek: On smaller devices (all except ATmega64/128),
__SPM_REG is in the I/O space, accessible with the shorter "in" and "out"
instructions - since the boot loader has a limited size, this could be an
important optimization.
\par API Usage Example
The following code shows typical usage of the boot API.
\code
#include <inttypes.h>
#include <avr/interrupt.h>
#include <avr/pgmspace.h>
void boot_program_page (uint32_t page, uint8_t *buf)
{
uint16_t i;
uint8_t sreg;
// Disable interrupts.
sreg = SREG;
cli();
eeprom_busy_wait ();
boot_page_erase (page);
boot_spm_busy_wait (); // Wait until the memory is erased.
for (i=0; i<SPM_PAGESIZE; i+=2)
{
// Set up little-endian word.
uint16_t w = *buf++;
w += (*buf++) << 8;
boot_page_fill (page + i, w);
}
boot_page_write (page); // Store buffer in flash page.
boot_spm_busy_wait(); // Wait until the memory is written.
// Reenable RWW-section again. We need this if we want to jump back
// to the application after bootloading.
boot_rww_enable ();
// Re-enable interrupts (if they were ever enabled).
SREG = sreg;
}\endcode */
#include <avr/eeprom.h>
#include <avr/io.h>
#include <inttypes.h>
#include <limits.h>
/* Check for SPM Control Register in processor. */
#if defined (SPMCSR)
# define __SPM_REG SPMCSR
#elif defined (SPMCR)
# define __SPM_REG SPMCR
#else
# error AVR processor does not provide bootloader support!
#endif
/* Check for SPM Enable bit. */
#if defined(SPMEN)
# define __SPM_ENABLE SPMEN
#elif defined(SELFPRGEN)
# define __SPM_ENABLE SELFPRGEN
#else
# error Cannot find SPM Enable bit definition!
#endif
/** \ingroup avr_boot
\def BOOTLOADER_SECTION
Used to declare a function or variable to be placed into a
new section called .bootloader. This section and its contents
can then be relocated to any address (such as the bootloader
NRWW area) at link-time. */
#define BOOTLOADER_SECTION __attribute__ ((section (".bootloader")))
/* Create common bit definitions. */
#ifdef ASB
#define __COMMON_ASB ASB
#else
#define __COMMON_ASB RWWSB
#endif
#ifdef ASRE
#define __COMMON_ASRE ASRE
#else
#define __COMMON_ASRE RWWSRE
#endif
/* Define the bit positions of the Boot Lock Bits. */
#define BLB12 5
#define BLB11 4
#define BLB02 3
#define BLB01 2
/** \ingroup avr_boot
\def boot_spm_interrupt_enable()
Enable the SPM interrupt. */
#define boot_spm_interrupt_enable() (__SPM_REG |= (uint8_t)_BV(SPMIE))
/** \ingroup avr_boot
\def boot_spm_interrupt_disable()
Disable the SPM interrupt. */
#define boot_spm_interrupt_disable() (__SPM_REG &= (uint8_t)~_BV(SPMIE))
/** \ingroup avr_boot
\def boot_is_spm_interrupt()
Check if the SPM interrupt is enabled. */
#define boot_is_spm_interrupt() (__SPM_REG & (uint8_t)_BV(SPMIE))
/** \ingroup avr_boot
\def boot_rww_busy()
Check if the RWW section is busy. */
#define boot_rww_busy() (__SPM_REG & (uint8_t)_BV(__COMMON_ASB))
/** \ingroup avr_boot
\def boot_spm_busy()
Check if the SPM instruction is busy. */
#define boot_spm_busy() (__SPM_REG & (uint8_t)_BV(__SPM_ENABLE))
/** \ingroup avr_boot
\def boot_spm_busy_wait()
Wait while the SPM instruction is busy. */
#define boot_spm_busy_wait() do{}while(boot_spm_busy())
#define __BOOT_PAGE_ERASE (_BV(__SPM_ENABLE) | _BV(PGERS))
#define __BOOT_PAGE_WRITE (_BV(__SPM_ENABLE) | _BV(PGWRT))
#define __BOOT_PAGE_FILL _BV(__SPM_ENABLE)
#define __BOOT_RWW_ENABLE (_BV(__SPM_ENABLE) | _BV(__COMMON_ASRE))
#define __BOOT_LOCK_BITS_SET (_BV(__SPM_ENABLE) | _BV(BLBSET))
#define __boot_page_fill_short(address, data) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r0, %3\n\t" \
"out %0, %1\n\t" \
"spm\n\t" \
"clr r1\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_FILL), \
"z" ((uint16_t)address), \
"r" ((uint16_t)data) \
: "r0" \
); \
}))
#define __boot_page_fill_normal(address, data) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r0, %3\n\t" \
"sts %0, %1\n\t" \
"spm\n\t" \
"clr r1\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_FILL), \
"z" ((uint16_t)address), \
"r" ((uint16_t)data) \
: "r0" \
); \
}))
#define __boot_page_fill_alternate(address, data)\
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r0, %3\n\t" \
"sts %0, %1\n\t" \
"spm\n\t" \
".word 0xffff\n\t" \
"nop\n\t" \
"clr r1\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_FILL), \
"z" ((uint16_t)address), \
"r" ((uint16_t)data) \
: "r0" \
); \
}))
#define __boot_page_fill_extended(address, data) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r0, %4\n\t" \
"movw r30, %A3\n\t" \
"sts %1, %C3\n\t" \
"sts %0, %2\n\t" \
"spm\n\t" \
"clr r1\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"i" (_SFR_MEM_ADDR(RAMPZ)), \
"r" ((uint8_t)__BOOT_PAGE_FILL), \
"r" ((uint32_t)address), \
"r" ((uint16_t)data) \
: "r0", "r30", "r31" \
); \
}))
#define __boot_page_fill_extended_short(address, data) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r0, %4\n\t" \
"movw r30, %A3\n\t" \
"out %1, %C3\n\t" \
"out %0, %2\n\t" \
"spm\n\t" \
"clr r1\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"i" (_SFR_IO_ADDR(RAMPZ)), \
"r" ((uint8_t)__BOOT_PAGE_FILL), \
"r" ((uint32_t)address), \
"r" ((uint16_t)data) \
: "r0", "r30", "r31" \
); \
}))
#define __boot_page_erase_short(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"out %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_ERASE), \
"z" ((uint16_t)address) \
); \
}))
#define __boot_page_erase_normal(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_ERASE), \
"z" ((uint16_t)address) \
); \
}))
#define __boot_page_erase_alternate(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
".word 0xffff\n\t" \
"nop\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_ERASE), \
"z" ((uint16_t)address) \
); \
}))
#define __boot_page_erase_extended(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r30, %A3\n\t" \
"sts %1, %C3\n\t" \
"sts %0, %2\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"i" (_SFR_MEM_ADDR(RAMPZ)), \
"r" ((uint8_t)__BOOT_PAGE_ERASE), \
"r" ((uint32_t)address) \
: "r30", "r31" \
); \
}))
#define __boot_page_erase_extended_short(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r30, %A3\n\t" \
"out %1, %C3\n\t" \
"out %0, %2\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"i" (_SFR_IO_ADDR(RAMPZ)), \
"r" ((uint8_t)__BOOT_PAGE_ERASE), \
"r" ((uint32_t)address) \
: "r30", "r31" \
); \
}))
#define __boot_page_write_short(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"out %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_WRITE), \
"z" ((uint16_t)address) \
); \
}))
#define __boot_page_write_normal(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_WRITE), \
"z" ((uint16_t)address) \
); \
}))
#define __boot_page_write_alternate(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
".word 0xffff\n\t" \
"nop\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_WRITE), \
"z" ((uint16_t)address) \
); \
}))
#define __boot_page_write_extended(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r30, %A3\n\t" \
"sts %1, %C3\n\t" \
"sts %0, %2\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"i" (_SFR_MEM_ADDR(RAMPZ)), \
"r" ((uint8_t)__BOOT_PAGE_WRITE), \
"r" ((uint32_t)address) \
: "r30", "r31" \
); \
}))
#define __boot_page_write_extended_short(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r30, %A3\n\t" \
"out %1, %C3\n\t" \
"out %0, %2\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"i" (_SFR_IO_ADDR(RAMPZ)), \
"r" ((uint8_t)__BOOT_PAGE_WRITE), \
"r" ((uint32_t)address) \
: "r30", "r31" \
); \
}))
#define __boot_rww_enable_short() \
(__extension__({ \
__asm__ __volatile__ \
( \
"out %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_RWW_ENABLE) \
); \
}))
#define __boot_rww_enable() \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_RWW_ENABLE) \
); \
}))
#define __boot_rww_enable_alternate() \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
".word 0xffff\n\t" \
"nop\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_RWW_ENABLE) \
); \
}))
/* From the mega16/mega128 data sheets (maybe others):
Bits by SPM To set the Boot Loader Lock bits, write the desired data to
R0, write "X0001001" to SPMCR and execute SPM within four clock cycles
after writing SPMCR. The only accessible Lock bits are the Boot Lock bits
that may prevent the Application and Boot Loader section from any
software update by the MCU.
If bits 5..2 in R0 are cleared (zero), the corresponding Boot Lock bit
will be programmed if an SPM instruction is executed within four cycles
after BLBSET and SPMEN (or SELFPRGEN) are set in SPMCR. The Z-pointer is
don't care during this operation, but for future compatibility it is
recommended to load the Z-pointer with $0001 (same as used for reading the
Lock bits). For future compatibility It is also recommended to set bits 7,
6, 1, and 0 in R0 to 1 when writing the Lock bits. When programming the
Lock bits the entire Flash can be read during the operation. */
#define __boot_lock_bits_set_short(lock_bits) \
(__extension__({ \
uint8_t value = (uint8_t)(~(lock_bits)); \
__asm__ __volatile__ \
( \
"ldi r30, 1\n\t" \
"ldi r31, 0\n\t" \
"mov r0, %2\n\t" \
"out %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
"r" (value) \
: "r0", "r30", "r31" \
); \
}))
#define __boot_lock_bits_set(lock_bits) \
(__extension__({ \
uint8_t value = (uint8_t)(~(lock_bits)); \
__asm__ __volatile__ \
( \
"ldi r30, 1\n\t" \
"ldi r31, 0\n\t" \
"mov r0, %2\n\t" \
"sts %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
"r" (value) \
: "r0", "r30", "r31" \
); \
}))
#define __boot_lock_bits_set_alternate(lock_bits) \
(__extension__({ \
uint8_t value = (uint8_t)(~(lock_bits)); \
__asm__ __volatile__ \
( \
"ldi r30, 1\n\t" \
"ldi r31, 0\n\t" \
"mov r0, %2\n\t" \
"sts %0, %1\n\t" \
"spm\n\t" \
".word 0xffff\n\t" \
"nop\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
"r" (value) \
: "r0", "r30", "r31" \
); \
}))
/*
Reading lock and fuse bits:
Similarly to writing the lock bits above, set BLBSET and SPMEN (or
SELFPRGEN) bits in __SPMREG, and then (within four clock cycles) issue an
LPM instruction.
Z address: contents:
0x0000 low fuse bits
0x0001 lock bits
0x0002 extended fuse bits
0x0003 high fuse bits
Sounds confusing, doesn't it?
Unlike the macros in pgmspace.h, no need to care for non-enhanced
cores here as these old cores do not provide SPM support anyway.
*/
/** \ingroup avr_boot
\def GET_LOW_FUSE_BITS
address to read the low fuse bits, using boot_lock_fuse_bits_get
*/
#define GET_LOW_FUSE_BITS (0x0000)
/** \ingroup avr_boot
\def GET_LOCK_BITS
address to read the lock bits, using boot_lock_fuse_bits_get
*/
#define GET_LOCK_BITS (0x0001)
/** \ingroup avr_boot
\def GET_EXTENDED_FUSE_BITS
address to read the extended fuse bits, using boot_lock_fuse_bits_get
*/
#define GET_EXTENDED_FUSE_BITS (0x0002)
/** \ingroup avr_boot
\def GET_HIGH_FUSE_BITS
address to read the high fuse bits, using boot_lock_fuse_bits_get
*/
#define GET_HIGH_FUSE_BITS (0x0003)
/** \ingroup avr_boot
\def boot_lock_fuse_bits_get(address)
Read the lock or fuse bits at \c address.
Parameter \c address can be any of GET_LOW_FUSE_BITS,
GET_LOCK_BITS, GET_EXTENDED_FUSE_BITS, or GET_HIGH_FUSE_BITS.
\note The lock and fuse bits returned are the physical values,
i.e. a bit returned as 0 means the corresponding fuse or lock bit
is programmed.
*/
#define boot_lock_fuse_bits_get_short(address) \
(__extension__({ \
uint8_t __result; \
__asm__ __volatile__ \
( \
"ldi r30, %3\n\t" \
"ldi r31, 0\n\t" \
"out %1, %2\n\t" \
"lpm %0, Z\n\t" \
: "=r" (__result) \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
"M" (address) \
: "r0", "r30", "r31" \
); \
__result; \
}))
#define boot_lock_fuse_bits_get(address) \
(__extension__({ \
uint8_t __result; \
__asm__ __volatile__ \
( \
"ldi r30, %3\n\t" \
"ldi r31, 0\n\t" \
"sts %1, %2\n\t" \
"lpm %0, Z\n\t" \
: "=r" (__result) \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
"M" (address) \
: "r0", "r30", "r31" \
); \
__result; \
}))
/** \ingroup avr_boot
\def boot_signature_byte_get(address)
Read the Signature Row byte at \c address. For some MCU types,
this function can also retrieve the factory-stored oscillator
calibration bytes.
Parameter \c address can be 0-0x1f as documented by the datasheet.
\note The values are MCU type dependent.
*/
#define __BOOT_SIGROW_READ (_BV(__SPM_ENABLE) | _BV(SIGRD))
#define boot_signature_byte_get_short(addr) \
(__extension__({ \
uint16_t __addr16 = (uint16_t)(addr); \
uint8_t __result; \
__asm__ __volatile__ \
( \
"out %1, %2\n\t" \
"lpm %0, Z" "\n\t" \
: "=r" (__result) \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"r" ((uint8_t) __BOOT_SIGROW_READ), \
"z" (__addr16) \
); \
__result; \
}))
#define boot_signature_byte_get(addr) \
(__extension__({ \
uint16_t __addr16 = (uint16_t)(addr); \
uint8_t __result; \
__asm__ __volatile__ \
( \
"sts %1, %2\n\t" \
"lpm %0, Z" "\n\t" \
: "=r" (__result) \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t) __BOOT_SIGROW_READ), \
"z" (__addr16) \
); \
__result; \
}))
/** \ingroup avr_boot
\def boot_page_fill(address, data)
Fill the bootloader temporary page buffer for flash
address with data word.
\note The address is a byte address. The data is a word. The AVR
writes data to the buffer a word at a time, but addresses the buffer
per byte! So, increment your address by 2 between calls, and send 2
data bytes in a word format! The LSB of the data is written to the lower
address; the MSB of the data is written to the higher address.*/
/** \ingroup avr_boot
\def boot_page_erase(address)
Erase the flash page that contains address.
\note address is a byte address in flash, not a word address. */
/** \ingroup avr_boot
\def boot_page_write(address)
Write the bootloader temporary page buffer
to flash page that contains address.
\note address is a byte address in flash, not a word address. */
/** \ingroup avr_boot
\def boot_rww_enable()
Enable the Read-While-Write memory section. */
/** \ingroup avr_boot
\def boot_lock_bits_set(lock_bits)
Set the bootloader lock bits.
\param lock_bits A mask of which Boot Loader Lock Bits to set.
\note In this context, a 'set bit' will be written to a zero value.
Note also that only BLBxx bits can be programmed by this command.
For example, to disallow the SPM instruction from writing to the Boot
Loader memory section of flash, you would use this macro as such:
\code
boot_lock_bits_set (_BV (BLB11));
\endcode
\note Like any lock bits, the Boot Loader Lock Bits, once set,
cannot be cleared again except by a chip erase which will in turn
also erase the boot loader itself. */
/* Normal versions of the macros use 16-bit addresses.
Extended versions of the macros use 32-bit addresses.
Alternate versions of the macros use 16-bit addresses and require special
instruction sequences after LPM.
FLASHEND is defined in the ioXXXX.h file.
USHRT_MAX is defined in <limits.h>. */
#if defined(__AVR_ATmega161__) || defined(__AVR_ATmega163__) \
|| defined(__AVR_ATmega323__)
/* Alternate: ATmega161/163/323 and 16 bit address */
#define boot_page_fill(address, data) __boot_page_fill_alternate(address, data)
#define boot_page_erase(address) __boot_page_erase_alternate(address)
#define boot_page_write(address) __boot_page_write_alternate(address)
#define boot_rww_enable() __boot_rww_enable_alternate()
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_alternate(lock_bits)
#elif (FLASHEND > USHRT_MAX)
/* Extended: >16 bit address */
#define boot_page_fill(address, data) __boot_page_fill_extended_short(address, data)
#define boot_page_erase(address) __boot_page_erase_extended_short(address)
#define boot_page_write(address) __boot_page_write_extended_short(address)
#define boot_rww_enable() __boot_rww_enable_short()
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_short(lock_bits)
#else
/* Normal: 16 bit address */
#define boot_page_fill(address, data) __boot_page_fill_short(address, data)
#define boot_page_erase(address) __boot_page_erase_short(address)
#define boot_page_write(address) __boot_page_write_short(address)
#define boot_rww_enable() __boot_rww_enable_short()
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_short(lock_bits)
#endif
/** \ingroup avr_boot
Same as boot_page_fill() except it waits for eeprom and spm operations to
complete before filling the page. */
#define boot_page_fill_safe(address, data) \
do { \
boot_spm_busy_wait(); \
eeprom_busy_wait(); \
boot_page_fill(address, data); \
} while (0)
/** \ingroup avr_boot
Same as boot_page_erase() except it waits for eeprom and spm operations to
complete before erasing the page. */
#define boot_page_erase_safe(address) \
do { \
boot_spm_busy_wait(); \
eeprom_busy_wait(); \
boot_page_erase (address); \
} while (0)
/** \ingroup avr_boot
Same as boot_page_write() except it waits for eeprom and spm operations to
complete before writing the page. */
#define boot_page_write_safe(address) \
do { \
boot_spm_busy_wait(); \
eeprom_busy_wait(); \
boot_page_write (address); \
} while (0)
/** \ingroup avr_boot
Same as boot_rww_enable() except waits for eeprom and spm operations to
complete before enabling the RWW mameory. */
#define boot_rww_enable_safe() \
do { \
boot_spm_busy_wait(); \
eeprom_busy_wait(); \
boot_rww_enable(); \
} while (0)
/** \ingroup avr_boot
Same as boot_lock_bits_set() except waits for eeprom and spm operations to
complete before setting the lock bits. */
#define boot_lock_bits_set_safe(lock_bits) \
do { \
boot_spm_busy_wait(); \
eeprom_busy_wait(); \
boot_lock_bits_set (lock_bits); \
} while (0)
#endif /* _AVR_BOOT_H_ */