Add STM32F1 HW support (#795)
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+16
-9
@@ -529,6 +529,8 @@
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#define MY_RF24_CS_PIN 3
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#elif defined(LINUX_ARCH_RASPBERRYPI)
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#define MY_RF24_CS_PIN 24
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#elif defined(ARDUINO_ARCH_STM32F1)
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#define MY_RF24_CS_PIN SS
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#else
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#define MY_RF24_CS_PIN 10
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#endif
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@@ -679,6 +681,14 @@
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#define MY_RF69_IRQ_PIN RF69_IRQ_PIN
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#endif
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/**
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* @def MY_RF69_IRQ_NUM
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* @brief RF69 IRQ pin number.
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*/
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#ifndef MY_RF69_IRQ_NUM
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#define MY_RF69_IRQ_NUM RF69_IRQ_NUM
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#endif
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/**
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* @def MY_RF69_SPI_CS
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* @brief RF69 SPI chip select pin.
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@@ -687,16 +697,13 @@
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#define MY_RF69_SPI_CS RF69_SPI_CS
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#endif
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/**
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* @def MY_RF69_IRQ_NUM
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* @brief RF69 IRQ pin number.
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*/
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#ifndef MY_RF69_IRQ_NUM
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#if defined(ARDUINO_ARCH_ESP8266)
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#define MY_RF69_IRQ_NUM RF69_IRQ_PIN
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#else
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#define MY_RF69_IRQ_NUM RF69_IRQ_NUM
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#endif
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* @def MY_RF69_SPI_CLOCK_DIV
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* @brief RF69 SPI Clock divider.
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*/
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#ifndef MY_RF69_SPI_CLOCK_DIV
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#define MY_RF69_SPI_CLOCK_DIV RF69_SPI_CLOCK_DIV
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#endif
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// Enables RFM69 encryption (all nodes and gateway must have this enabled, and all must be personalized with the same AES key)
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