152 lines
3.8 KiB
C
152 lines
3.8 KiB
C
/*
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* Copyright (c) 2009 Andrew Smallbone <andrew@rocketnumbernine.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "spi.h"
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#ifdef __cplusplus
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extern "C"{
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#endif
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#ifdef __ARDUINO__
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#include <wiring.h>
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#endif
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#ifndef SPI_SOFT_DRIVER
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// hardware driver
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void setup_spi(uint8_t mode, int dord, int interrupt, uint8_t clock)
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{
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// specify pin directions for SPI pins on port B
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if (clock == SPI_SLAVE) { // if slave SS and SCK is input
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DDRB &= ~(1<<SPI_MOSI_PIN); // input
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DDRB |= (1<<SPI_MISO_PIN); // output
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DDRB &= ~(1<<SPI_SS_PIN); // input
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DDRB &= ~(1<<SPI_SCK_PIN);// input
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} else {
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DDRB |= (1<<SPI_MOSI_PIN); // output
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DDRB &= ~(1<<SPI_MISO_PIN); // input
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DDRB |= (1<<SPI_SCK_PIN);// output
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DDRB |= (1<<SPI_SS_PIN);// output
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}
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SPCR = ((interrupt ? 1 : 0)<<SPIE) // interrupt enabled
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| (1<<SPE) // enable SPI
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| (dord<<DORD) // LSB or MSB
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| (((clock != SPI_SLAVE) ? 1 : 0) <<MSTR) // Slave or Master
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| (((mode & 0x02) == 2) << CPOL) // clock timing mode CPOL
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| (((mode & 0x01)) << CPHA) // clock timing mode CPHA
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| (((clock & 0x02) == 2) << SPR1) // cpu clock divisor SPR1
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| ((clock & 0x01) << SPR0); // cpu clock divisor SPR0
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SPSR = (((clock & 0x04) == 4) << SPI2X); // clock divisor SPI2X
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}
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void disable_spi()
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{
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SPCR = 0;
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}
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uint8_t send_spi(uint8_t out)
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{
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SPDR = out;
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while (!(SPSR & (1<<SPIF)));
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return SPDR;
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}
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uint8_t received_from_spi(uint8_t data)
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{
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SPDR = data;
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return SPDR;
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}
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#else
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// software driver
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void setup_spi(uint8_t mode, int dord, int interrupt, uint8_t clock)
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{
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if(mode) if(dord) if (interrupt) if(clock) {}
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// specify pin directions for SPI pins on port B
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if (clock == SPI_SLAVE) { // if slave SS and SCK is input
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SPI_DDR &= ~(1<<SPI_MOSI_PIN); // input
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SPI_DDR |= (1<<SPI_MISO_PIN); // output
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// SPI_DDR &= ~(1<<SPI_SS_PIN); // input
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SPI_DDR &= ~(1<<SPI_SCK_PIN);// input
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} else {
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SPI_DDR |= (1<<SPI_MOSI_PIN); // output
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SPI_DDR &= ~(1<<SPI_MISO_PIN); // input
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SPI_DDR |= (1<<SPI_SCK_PIN);// output
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// SPI_DDR |= (1<<SPI_SS_PIN);// output
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}
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}
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void disable_spi()
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{
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}
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uint8_t send_spi(uint8_t tx)
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{
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uint8_t i = 0;
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uint8_t rx = 0;
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SPI_PORT &= ~(1 << SPI_SCK_PIN);
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_delay_us(50);
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//nrf24_sck_digitalWrite(LOW);
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for(i=0;i<8;i++)
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{
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if(tx & (1<<(7-i)))
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{
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SPI_PORT |= (1 << SPI_MOSI_PIN);
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//nrf24_mosi_digitalWrite(HIGH);
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}
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else
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{
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SPI_PORT &= ~(1 << SPI_MOSI_PIN);
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//nrf24_mosi_digitalWrite(LOW);
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}
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SPI_PORT |= (1 << SPI_SCK_PIN);
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//nrf24_sck_digitalWrite(HIGH);
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_delay_us(50);
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rx = rx << 1;
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if(SPI_PIN & (1 << SPI_MISO_PIN))
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//if(nrf24_miso_digitalRead())
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{
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rx |= 0x01;
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}
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//nrf24_sck_digitalWrite(LOW);
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SPI_PORT &= ~(1 << SPI_SCK_PIN);
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}
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_delay_us(50);
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return rx;
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}
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//uint8_t received_from_spi(uint8_t data)
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//{
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//}
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#endif
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